Product details

Bus voltage (Max) (V) 28 Power switch MOSFET Input VCC (Min) (V) 4.5 Input VCC (Max) (V) 5.5 Peak output current (A) 4 Rise time (ns) 15 Operating temperature range (C) -40 to 105 Undervoltage lockout (Typ) 4 Rating Catalog Number of channels (#) 2 Fall time (ns) 10 Prop delay (ns) 15 Iq (uA) 500 Channel input logic TTL Negative voltage handling at HS pin (V) -0.1 Features Dead Time Control, Synchronous Rectification Driver configuration Dual
Bus voltage (Max) (V) 28 Power switch MOSFET Input VCC (Min) (V) 4.5 Input VCC (Max) (V) 5.5 Peak output current (A) 4 Rise time (ns) 15 Operating temperature range (C) -40 to 105 Undervoltage lockout (Typ) 4 Rating Catalog Number of channels (#) 2 Fall time (ns) 10 Prop delay (ns) 15 Iq (uA) 500 Channel input logic TTL Negative voltage handling at HS pin (V) -0.1 Features Dead Time Control, Synchronous Rectification Driver configuration Dual
WSON (DSG) 8 4 mm² 2 x 2
  • Reduced Dead-Time Drive Circuit for Optimized
    CCM
  • Automatic Zero Crossing Detection for Optimized
    DCM Efficiency
  • Multiple Low-Power Modes for Optimized Light-
    Load Efficiency
  • Optimized Signal Path Delays for High-Frequency
    Operation
  • Integrated BST Switch Drive Strength Optimized
    for Ultrabook FETs
  • Optimized for 5-V FET Drive
  • Conversion Input Voltage Range (VIN): 4.5 to 28 V
  • 2-mm × 2-mm, 8-Pin, WSON Thermal Pad
    Package
  • Reduced Dead-Time Drive Circuit for Optimized
    CCM
  • Automatic Zero Crossing Detection for Optimized
    DCM Efficiency
  • Multiple Low-Power Modes for Optimized Light-
    Load Efficiency
  • Optimized Signal Path Delays for High-Frequency
    Operation
  • Integrated BST Switch Drive Strength Optimized
    for Ultrabook FETs
  • Optimized for 5-V FET Drive
  • Conversion Input Voltage Range (VIN): 4.5 to 28 V
  • 2-mm × 2-mm, 8-Pin, WSON Thermal Pad
    Package

The TPS51604 drivers are optimized for high-frequency CPU VCORE applications. Advanced features such as reduced dead-time drive and auto zero crossing are used to optimize efficiency over the entire load range.

The SKIP pin provides the option of CCM operation to support controlled management of the output voltage. In addition, the TPS51604 supports two low-power modes. With the PWM input in tri-state, quiescent current is reduced to 130 µA, with immediate response. When SKIP is held at tri-state, the current is reduced to 8 µA (typically 20 µs is required to resume switching). Paired with the appropriate TI controller, the drivers deliver an exceptionally high performance power supply system.

The TPS51604 device is packaged in a space saving, thermally-enhanced 8-pin, 2-mm × 2-mm WSON package and operates from –40°C to 105°C.

The TPS51604 drivers are optimized for high-frequency CPU VCORE applications. Advanced features such as reduced dead-time drive and auto zero crossing are used to optimize efficiency over the entire load range.

The SKIP pin provides the option of CCM operation to support controlled management of the output voltage. In addition, the TPS51604 supports two low-power modes. With the PWM input in tri-state, quiescent current is reduced to 130 µA, with immediate response. When SKIP is held at tri-state, the current is reduced to 8 µA (typically 20 µs is required to resume switching). Paired with the appropriate TI controller, the drivers deliver an exceptionally high performance power supply system.

The TPS51604 device is packaged in a space saving, thermally-enhanced 8-pin, 2-mm × 2-mm WSON package and operates from –40°C to 105°C.

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Technical documentation

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Type Title Date
* Data sheet TPS51604 Synchronous Buck FET Driver for High-Frequency CPU Core Power datasheet (Rev. B) PDF | HTML 23 Oct 2015
Application note External Gate Resistor Selection Guide (Rev. A) 28 Feb 2020
Application note Understanding Peak IOH and IOL Currents (Rev. A) 28 Feb 2020
More literature Fundamentals of MOSFET and IGBT Gate Driver Circuits (Replaces SLUP169) (Rev. A) 29 Oct 2018
Technical article How to achieve higher system robustness in DC drives, part 3: minimum input pulse 19 Sep 2018
Technical article How to achieve higher system robustness in DC drives, part 2: interlock and deadtime 30 May 2018
Technical article Boosting efficiency for your solar inverter designs 24 May 2018
Technical article How to achieve higher system robustness in DC drives, part 1: negative voltage 17 Apr 2018

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Simulation model

TPS51604 PSpice Transient Model

SLUM641.ZIP (34 KB) - PSpice Model
Simulation tool

PSPICE-FOR-TI — PSpice® for TI design and simulation tool

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
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Test report: PDF
Schematic: PDF
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Design guide: PDF
Schematic: PDF
Package Pins Download
WSON (DSG) 8 View options

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