TS5L100

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5-V, 2:1 (SPDT), 4-channel LAN switch

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Product details

Parameters

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Package | Pins | Size

SOIC (D) 16 59 mm² 9.9 x 6 SSOP (DBQ) 16 29 mm² 4.9 x 6 TSSOP (PW) 20 42 mm² 6.5 x 6.4 open-in-new Find other Protocol-specific switches & muxes

Features

  • Wide Bandwidth (BW = 300 MHz Min)
  • Low Differential Crosstalk (XTALK = –60 dB Typ)
  • Low Power Consumption (ICC = 3 µA Max)
  • Bidirectional Data Flow, With Near-Zero Propagation Delay
  • Low ON-State Resistance (ron = 3 Typ)
  • VCC Operating Range From 6 V to 6.5 V
  • Ioff Supports Partial-Power-Down Mode Operation
  • Data and Control Inputs Provide Undershoot Clamp Diode
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Performance Tested Per JESD 22
    • 2000-V Human-Body Model (A114-B, Class II)
    • 1000-V Charged-Device Model (C101)
  • Suitable for Both 10 Base-T/100 Base-T Signaling

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Description

The TI TS5L100 LAN switch is a 4-bit 1-of-2 multiplexer/demultiplexer with a single switch-enable (E)\ input. When E\ is low, the switch is enabled and the I port is connected to the Y port. When E\ is high, the switch is disabled and the high-impedance state exists between the I and Y ports. The select (S) input controls the data path of the multiplexer/demultiplexer.

This device can be used to replace mechanical relays in LAN applications. This device has low ron, wide bandwidth, and low differential crosstalk, making it suitable for 10 Base-T, 100 Base-T, and various other LAN applications.

This device is fully specified for partial-power-down applications using Ioff. The Ioff feature ensures that damaging current will not backflow through the device when it is powered down. The device has isolation during power off.

To ensure the high-impedance state during power up or power down, E\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

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Technical documentation

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Type Title Date
* Data sheet TS5L100 datasheet (Rev. A) May 12, 2004
Application note Preventing Excess Power Consumption on Analog Switches Jul. 03, 2008
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection Jul. 08, 2004
More literature TS5L100 and TS3L100 Application Clip May 25, 2004

Design & development

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Hardware development

INTERFACE ADAPTER Download
document-generic User guide
10
Description

The EVM-LEADED1 board allows for quick testing and bread boarding of TI's common leaded packages.  The board has footprints to convert TI's D, DBQ, DCT,DCU, DDF, DGS, DGV, and PW surface mount packages to 100mil DIP headers.     

Features
  • Quick testing of TI's leaded surface mount packages 
  • Allows leaded suface mount packages to be plugged into 100mil spaced bread board 
  • Supports TI's 8 most popular leaded packages with a single panel


CAD/CAE symbols

Package Pins Download
SOIC (D) 16 View options
SSOP (DBQ) 16 View options
TSSOP (PW) 20 View options

Ordering & quality

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  • Lead finish/Ball material
  • MSL rating/Peak reflow
  • MTBF/FIT estimates
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  • Qualification summary
  • Ongoing reliability monitoring

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