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TXG1041-Q1

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Automotive, ±10V, 4-bit fixed-direction ground-level translators, 3/1 configuration

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Data sheet

TXG1041-Q1

ACTIVE
Data sheet Order now

Product details

Rating Automotive Ground offset voltage (max) (V) 10 Bits (#) 4 Topology Push-Pull Applications GPIO, I2S, PCM, SPI Forward/reverse channels 3 forward / 1 reverse Isolation rating Functional Data rate (max) (Mbps) 250 Prop delay (ns) 5.9 CMTI (V/µs) 1000 Technology family TXG Vin (min) (V) 1.71 Vin (max) (V) 5.5 Output type 3-State Vout (min) (V) 1.71 Vout (max) (V) 5.5 Current consumption per channel (1 Mbps) (typ) (mA) 3.3 Features AEC Q100, Partial power down (Ioff)
Rating Automotive Ground offset voltage (max) (V) 10 Bits (#) 4 Topology Push-Pull Applications GPIO, I2S, PCM, SPI Forward/reverse channels 3 forward / 1 reverse Isolation rating Functional Data rate (max) (Mbps) 250 Prop delay (ns) 5.9 CMTI (V/µs) 1000 Technology family TXG Vin (min) (V) 1.71 Vin (max) (V) 5.5 Output type 3-State Vout (min) (V) 1.71 Vout (max) (V) 5.5 Current consumption per channel (1 Mbps) (typ) (mA) 3.3 Features AEC Q100, Partial power down (Ioff)
SOT-23-THN (DYY) 14 13.692 mm² 4.2 x 3.26 SSOP (DBQ) 16 29.4 mm² 4.9 x 6 X2QFN (RUC) 14 4 mm² 2 x 2
  • AEC-Q100 qualified for automotive applications
  • Supports DC shifts up to ±10V
  • AC Noise Rejection of 20VPP up to 45MHz
  • CMTI of 1kV/µs
  • Low Prop Delay (<5ns) and Ch-Ch Skew (0.35ns)
  • Greater than 250Mbps
  • Low power consumption (0.65mA per channel at 1Mbps, 1.8V)
  • Fully configurable dual-rail design allows each port to operate from 1.71V to 5.5V
  • 4, 2, 1 channel devices with multiple configurations will be available
  • Two device variants:
    • TXG1041-Q1: 3 forward, 1 reverse
    • TXG1042-Q1: 2 forward, 2 reverse
  • Supports VCC disconnect feature (I/Os are forced into high-Z)
  • Schmitt-trigger inputs allows for slow and noisy signals
  • Inputs with integrated static pull-down resistors prevent channels from floating
  • Operating temperature from –40°C to +125°C
  • Latch-up performance exceeds 100mA per JESD 78, class II
    • ESD protection exceeds JESD 22
    • 4000V human-body model
    • 500V charged-device model
  • Package options provided:
    • RUC (X2QFN-14)
    • DYY (SOT-14)
    • DBQ (QSOP-16)
  • AEC-Q100 qualified for automotive applications
  • Supports DC shifts up to ±10V
  • AC Noise Rejection of 20VPP up to 45MHz
  • CMTI of 1kV/µs
  • Low Prop Delay (<5ns) and Ch-Ch Skew (0.35ns)
  • Greater than 250Mbps
  • Low power consumption (0.65mA per channel at 1Mbps, 1.8V)
  • Fully configurable dual-rail design allows each port to operate from 1.71V to 5.5V
  • 4, 2, 1 channel devices with multiple configurations will be available
  • Two device variants:
    • TXG1041-Q1: 3 forward, 1 reverse
    • TXG1042-Q1: 2 forward, 2 reverse
  • Supports VCC disconnect feature (I/Os are forced into high-Z)
  • Schmitt-trigger inputs allows for slow and noisy signals
  • Inputs with integrated static pull-down resistors prevent channels from floating
  • Operating temperature from –40°C to +125°C
  • Latch-up performance exceeds 100mA per JESD 78, class II
    • ESD protection exceeds JESD 22
    • 4000V human-body model
    • 500V charged-device model
  • Package options provided:
    • RUC (X2QFN-14)
    • DYY (SOT-14)
    • DBQ (QSOP-16)

The TXG104x-Q1 is a 4-bit, fixed direction, non-galvanic based voltage and ground-level translator that can support both logic-level shifting between 1.71V to 5.5V and ground-level shifting up to ±10V. Compared to traditional level shifters, the TXG104x-Q1 family can solve the challenges of voltage translation across different ground levels. The Simplified Diagram shows a common use case where DC shift occurs between GNDA to GNDB due to parasitic resistance or capacitance.

VCCA is referenced to GNDA and VCCB is referenced to GNDB. Ax pins are referenced to VCCA logic level while Bx pins are referenced to VCCB logic levels. Both A port and B port can accept voltages from 1.71V to 5.5V. This device includes two enable pins that can place the respective outputs in a high-impedance state when the OE pin is connected to GND or left floating. In the event of input power or signal loss, the output is default low when OE is High (refer to ). The leakage between GNDA and GNDB is <30nA when VCC to GND is shorted.

The TXG104x-Q1 device helps improve noise immunity and power sequencing across different ground domains while providing low power consumption, latency and channel-to-channel skew. It can supress noise levels of 20VPP up to 45MHz (Figure 7-5). This device can support multiple interfaces such as SPI, UART, GPIO, and I2S.

The TXG104x-Q1 is a 4-bit, fixed direction, non-galvanic based voltage and ground-level translator that can support both logic-level shifting between 1.71V to 5.5V and ground-level shifting up to ±10V. Compared to traditional level shifters, the TXG104x-Q1 family can solve the challenges of voltage translation across different ground levels. The Simplified Diagram shows a common use case where DC shift occurs between GNDA to GNDB due to parasitic resistance or capacitance.

VCCA is referenced to GNDA and VCCB is referenced to GNDB. Ax pins are referenced to VCCA logic level while Bx pins are referenced to VCCB logic levels. Both A port and B port can accept voltages from 1.71V to 5.5V. This device includes two enable pins that can place the respective outputs in a high-impedance state when the OE pin is connected to GND or left floating. In the event of input power or signal loss, the output is default low when OE is High (refer to ). The leakage between GNDA and GNDB is <30nA when VCC to GND is shorted.

The TXG104x-Q1 device helps improve noise immunity and power sequencing across different ground domains while providing low power consumption, latency and channel-to-channel skew. It can supress noise levels of 20VPP up to 45MHz (Figure 7-5). This device can support multiple interfaces such as SPI, UART, GPIO, and I2S.
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Technical documentation

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Top documentation Type Title Format options Date
* Data sheet TXG104x-Q1 4-bit , ± 10V Ground-Level Translator datasheet (Rev. A) PDF | HTML 21 Jan 2026
Application brief Top Questions about Ground-Level Translators PDF | HTML 27 May 2026
Application note Solving Ground Mismatch in Automotive Systems PDF | HTML 03 Mar 2026
Technical article Uneven grounds? Address offset challenges with novel ground-level translators (Rev. A) PDF | HTML 05 Jun 2025
Technical article 接地電位不均？以新型的接地電平轉換器解決偏移挑戰 (Rev. A) PDF | HTML 05 Jun 2025
Technical article 접지가 불안정하신가요? 새로운 접지 레벨 트랜스레이터로 오 프셋 문제를 해결하세요. (Rev. A) PDF | HTML 05 Jun 2025
Application brief Not All Grounds Are 0V PDF | HTML 21 May 2025
Product overview TI's Latest Ground-Level Translators PDF | HTML 07 May 2025

Design & development

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Evaluation board

14-24-LOGIC-EVM — Logic product generic evaluation module for 14-pin to 24-pin D, DB, DGV, DW, DYY, NS and PW packages

The 14-24-LOGIC-EVM evaluation module (EVM) is designed to support any logic device that is in a 14-pin to 24-pin D, DW, DB, NS, PW, DYY or DGV package,

User guide: PDF | HTML
Not available on TI.com
Evaluation board

TXG-4CH-EVM — TXG evaluation module for 4-channel ground-level translator

TXG-4CH-EVM is an evaluation module (EVM) used to evaluate the TXGx04x 4-channel ground-level translator product family. The EVM supports multiple package options, which include 16-pin DBQ, 14-pin DYY, and 14-pin RUC. The EVM features multiple test points and connection options to evaluate the (...)
User guide: PDF | HTML
Not available on TI.com
Package Pins CAD symbols, footprints & 3D models
SOT-23-THN (DYY) 14 Ultra Librarian
SSOP (DBQ) 16 Ultra Librarian
X2QFN (RUC) 14 Ultra Librarian
TI's Standard Terms and Conditions for Evaluation Items apply.

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