TXS0101

ACTIVE

1-bit bidirectional voltage-level shifter for open-drain and push-pull applications

Product details

Technology family TXS Bits (#) 1 Data rate (max) (Mbps) 24 High input voltage (min) (V) 1.45 High input voltage (max) (V) 5.5 Vout (min) (V) 1.65 Vout (max) (V) 5.5 IOH (max) (mA) 0 IOL (max) (mA) 0 Supply current (max) (µA) 14.4 Features Edge rate accelerator, Output enable, Partial power down (Ioff), Vcc isolation Input type Transmission Gate Output type 3-State, Transmission Gate Rating Catalog Operating temperature range (°C) -40 to 85
Technology family TXS Bits (#) 1 Data rate (max) (Mbps) 24 High input voltage (min) (V) 1.45 High input voltage (max) (V) 5.5 Vout (min) (V) 1.65 Vout (max) (V) 5.5 IOH (max) (mA) 0 IOL (max) (mA) 0 Supply current (max) (µA) 14.4 Features Edge rate accelerator, Output enable, Partial power down (Ioff), Vcc isolation Input type Transmission Gate Output type 3-State, Transmission Gate Rating Catalog Operating temperature range (°C) -40 to 85
DSBGA (YZP) 6 2.1875 mm² 1.75 x 1.25 SOT-23 (DBV) 6 8.12 mm² 2.9 x 2.8 SOT-5X3 (DRL) 6 2.56 mm² 1.6 x 1.6 SOT-SC70 (DCK) 6 4.2 mm² 2 x 2.1
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • A Port
      • 2500 V Human-Body Model (A114-B)
      • 200 V Machine Model (A115-A)
      • 1500 V Charged-Device Model (C101)
    • B Port
      • 8 kV Human-Body Model (A114-B)
      • 200 V Machine Model (A115-A)
      • 1500 V Charged-Device Model (C101)
  • No Direction-Control Signal Needed
  • Maximum Data Rates
    • 24 Mbps (Push Pull)
    • 2 Mbps (Open Drain)
  • Available in the Texas Instruments NanoFree™ Package
  • 1.65 V to 3.6 V on A port and 2.3 V to 5.5 V on B port (VCCA  ≤ VCCB)
  • VCC Isolation Feature – If Either VCC Input Is at GND, Both Ports Are in the High-Impedance State
  • No Power-Supply Sequencing Required – Either VCCA or VCCB Can be Ramped First
  • Ioff Supports Partial-Power-Down Mode Operation
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • A Port
      • 2500 V Human-Body Model (A114-B)
      • 200 V Machine Model (A115-A)
      • 1500 V Charged-Device Model (C101)
    • B Port
      • 8 kV Human-Body Model (A114-B)
      • 200 V Machine Model (A115-A)
      • 1500 V Charged-Device Model (C101)
  • No Direction-Control Signal Needed
  • Maximum Data Rates
    • 24 Mbps (Push Pull)
    • 2 Mbps (Open Drain)
  • Available in the Texas Instruments NanoFree™ Package
  • 1.65 V to 3.6 V on A port and 2.3 V to 5.5 V on B port (VCCA  ≤ VCCB)
  • VCC Isolation Feature – If Either VCC Input Is at GND, Both Ports Are in the High-Impedance State
  • No Power-Supply Sequencing Required – Either VCCA or VCCB Can be Ramped First
  • Ioff Supports Partial-Power-Down Mode Operation

This one-bit non-inverting translator uses two separate configurable power-supply rails. The A port is designed to track VCCA. VCCA accepts any supply voltage from 1.65 V to 3.6 V. The B port is designed to track VCCB. VCCA must be less than or equal to VCCB. VCCB accepts any supply voltage from 2.3 V to 5.5 V. This allows for low voltage bidirectional translation between any of the 1.8 V, 2.5 V, 3.3 V, and 5 V voltage nodes.

When the output-enable (OE) input is low, all outputs are placed in the high-impedance state.

To ensure the high-impedance state during power up or power down, OE should be tied to GND through a pull-down resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.

This one-bit non-inverting translator uses two separate configurable power-supply rails. The A port is designed to track VCCA. VCCA accepts any supply voltage from 1.65 V to 3.6 V. The B port is designed to track VCCB. VCCA must be less than or equal to VCCB. VCCB accepts any supply voltage from 2.3 V to 5.5 V. This allows for low voltage bidirectional translation between any of the 1.8 V, 2.5 V, 3.3 V, and 5 V voltage nodes.

When the output-enable (OE) input is low, all outputs are placed in the high-impedance state.

To ensure the high-impedance state during power up or power down, OE should be tied to GND through a pull-down resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.

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Design & development

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Simulation model

HSPICE Model for TXS0101

SCEJ264.ZIP (96 KB) - HSpice Model
Simulation model

TXS0101 IBIS Model

SCEM527.ZIP (24 KB) - IBIS Model
Package Pins Download
DSBGA (YZP) 6 View options
SOT-23 (DBV) 6 View options
SOT-5X3 (DRL) 6 View options
SOT-SC70 (DCK) 6 View options

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