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Product details

Parameters

Technology Family TXS Application I2C, MDIO, SMbus Bits (#) 8 High input voltage (Min) (Vih) 1 High input voltage (Max) (Vih) 5.5 Output voltage (Max) (V) 5.5 Output voltage (Min) (V) 1.4 IOH (Max) (mA) 0 IOL (Max) (mA) 0 Rating Catalog open-in-new Find other Auto bidirectional voltage translators

Package | Pins | Size

BGA MICROSTAR JUNIOR (ZXY) 20 8 mm² 2.5 x 3 TSSOP (PW) 20 42 mm² 6.5 x 6.4 VQFN (RGY) 20 16 mm² 3.5 x 4.5 open-in-new Find other Auto bidirectional voltage translators

Features

  • No direction-control signal needed
  • Maximum data rates
    • 110 Mbps (push pull)
    • 1.2 Mbps (open drain)
  • 1.4 V to 3.6 V on A port and 1.65 V to 5.5 V on B port (VCCA ≤ VCCB)
  • No power-supply sequencing required – either VCCA or VCCB can be ramped first
  • Latch-up performance exceeds 100 mA per
    JESD 78, Class II
  • ESD protection exceeds JESD 22 (A Port)
    • 2000-V human body model (A114-B)
    • 150-V machine model (A115-A)
    • 1000-V charged-device model (C101)
  • IEC 61000-4-2 ESD (B port)
    • ±8 kV contact discharge
    • ±6 kV Air-gap discharge

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Description

This device is an 8-bit non-inverting level translator that uses two separate configurable power-supply rails. The A port tracks the VCCA pin supply voltage. The VCCA pin accepts any supply voltage between 1.4 V and 3.6 V. The B port tracks the VCCB pin supply voltage. The VCCB pin accepts any supply voltage between 1.65 V and 5.5 V. Two input supply pins allows for low Voltage bidirectional translation between any of the 1.5 V, 1.8 V, 2.5 V, 3.3 V, and 5 V voltage nodes.

When the output-enable (OE) input is low, all outputs are placed in the high-impedance (Hi-Z) state.

To ensure the Hi-Z state during power-up or power-down periods, tie OE to GND through a pull-down resistor. The minimum value of the resistor is determined by the current-sourcing capability of the driver.

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Technical documentation

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Type Title Date
* Datasheet TXS0108E 8-Bit Bi-directional, Level-Shifting, Voltage Translator for Open-Drain and Push-Pull Applications datasheet (Rev. H) May 21, 2020
User guides TXS-EVM Evaluation module Users guide (Rev. A) Nov. 27, 2019
User guides TXS-EVM Evaluation module Users guide Oct. 08, 2019
Selection guides Voltage translation buying guide Jun. 13, 2019
Application notes Effects of pullup and pulldown resistors on TXS and TXB devices (Rev. A) Mar. 28, 2018
Application notes A Guide to Voltage Translation With TXS-Type Translators Jun. 29, 2010

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

EVALUATION BOARDS Download
document-generic User guide
$10.00
Description
This EVM is designed to support any logic device that has a D, DW, DB, NS, PW, P, N, or DGV package in a 14 to 24 pin count.
Features
  • Board design allows for versatility in evaluation
  • Supports a wide-range of logic devices
EVALUATION BOARDS Download
document-generic User guide
$20.00
Description

The TXS-EVM is designed to support single, dual, quad and octal channel TXS devices. The TXS devices belong to the auto bidirectional voltage level translation family with an operating voltage between 1.2V and 5.5 V designed to support various generic voltage level translation applications across (...)

Features
  • Supports the TXS0101, TXS0102, TXS0104e, TXS0108e
  • Supports DCK, DQE, PW and RGY families of TI
  • Option of individual external loading per channel
  • Additional package options supported on the footprint

Design tools & simulation

SIMULATION MODELS Download
SCEM547A.ZIP (167 KB) - IBIS Model

Reference designs

REFERENCE DESIGNS Download
SDI Video Aggregation Reference Design
TIDA-00352 This verified reference design is a complete four channel SDI aggregation and de-aggregation solution. One TLK10022 is used to aggregate four synchronous HD-SDI sources together into one 5.94 Gbps serial link. The serial data is transferred via copper or optical fiber where a second TLK10022 is used (...)
document-generic Schematic document-generic User guide

CAD/CAE symbols

Package Pins Download
(NME) 20 View options
BGA MICROSTAR JUNIOR (ZXY) 20 View options
TSSOP (PW) 20 View options
VQFN (RGY) 20 View options

Ordering & quality

Support & training

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