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ADC12DJ5210RF

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RF-sampling 12-bit ADC with dual-channel 5.2 GSPS or single-channel 10.4 GSPS

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ADC12DJ5210RF

AKTIV
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Produktdetails

Sample rate (max) (Msps) 5200, 10400 Resolution (Bits) 12 Number of input channels 1, 2 Interface type JESD204B, JESD204C Analog input BW (MHz) 7900 Features Ultra High Speed Rating Catalog Peak-to-peak input voltage range (V) 0.825 Power consumption (typ) (mW) 4000 Architecture Folding Interpolating SNR (dB) 55.6 ENOB (Bits) 8.8 SFDR (dB) 65 Operating temperature range (°C) -40 to 85 Input buffer Yes
Sample rate (max) (Msps) 5200, 10400 Resolution (Bits) 12 Number of input channels 1, 2 Interface type JESD204B, JESD204C Analog input BW (MHz) 7900 Features Ultra High Speed Rating Catalog Peak-to-peak input voltage range (V) 0.825 Power consumption (typ) (mW) 4000 Architecture Folding Interpolating SNR (dB) 55.6 ENOB (Bits) 8.8 SFDR (dB) 65 Operating temperature range (°C) -40 to 85 Input buffer Yes
FCCSP (AAV) 144 100 mm² (10 mm × 10 mm)
  • ADC core:
    • 12-bit resolution
    • Up to 10.4GSPS in single-channel mode
    • Up to 5.2GSPS in dual-channel mode
  • Performance specifications:
    • Noise floor (–20dBFS, VFS = 1VPP-DIFF):
      • Dual-channel mode: –151.8dBFS/Hz
      • Single-channel mode: –154.4dBFS/Hz
    • ENOB (dual channel, FIN = 2.4GHz): 8.6 Bits
  • Buffered analog inputs with VCMI of 0V:
    • Analog input bandwidth (–3dB): 8GHz
    • Usable input frequency range: > 10GHz
    • Full-scale input voltage (VFS, default): 0.8VPP
  • Noiseless aperture delay (tAD) adjustment:
    • Precise sampling control: 19fs Step
    • Simplifies synchronization and interleaving
    • Temperature and voltage invariant delays
  • Easy-to-use synchronization features:
    • Automatic SYSREF timing calibration
    • Timestamp for sample marking
  • JESD204C serial data interface:
    • Maximum lane rate: 17.16Gbps
    • Support for 64b/66b and 8b/10b encoding
    • 8b/10b modes are JESD204B compatible
  • Optional digital down-converters (DDC):
    • 4x, 8x, 16x and 32x complex decimation
    • Four independent 32-Bit NCOs per DDC
  • Peak RF Input Power (Diff): +26.5dBm (+ 27.5dBFS, 560x fullscale power)
  • Programmable FIR filter for equalization
  • Power consumption: 4W
  • Power supplies: 1.1V, 1.9V
  • ADC core:
    • 12-bit resolution
    • Up to 10.4GSPS in single-channel mode
    • Up to 5.2GSPS in dual-channel mode
  • Performance specifications:
    • Noise floor (–20dBFS, VFS = 1VPP-DIFF):
      • Dual-channel mode: –151.8dBFS/Hz
      • Single-channel mode: –154.4dBFS/Hz
    • ENOB (dual channel, FIN = 2.4GHz): 8.6 Bits
  • Buffered analog inputs with VCMI of 0V:
    • Analog input bandwidth (–3dB): 8GHz
    • Usable input frequency range: > 10GHz
    • Full-scale input voltage (VFS, default): 0.8VPP
  • Noiseless aperture delay (tAD) adjustment:
    • Precise sampling control: 19fs Step
    • Simplifies synchronization and interleaving
    • Temperature and voltage invariant delays
  • Easy-to-use synchronization features:
    • Automatic SYSREF timing calibration
    • Timestamp for sample marking
  • JESD204C serial data interface:
    • Maximum lane rate: 17.16Gbps
    • Support for 64b/66b and 8b/10b encoding
    • 8b/10b modes are JESD204B compatible
  • Optional digital down-converters (DDC):
    • 4x, 8x, 16x and 32x complex decimation
    • Four independent 32-Bit NCOs per DDC
  • Peak RF Input Power (Diff): +26.5dBm (+ 27.5dBFS, 560x fullscale power)
  • Programmable FIR filter for equalization
  • Power consumption: 4W
  • Power supplies: 1.1V, 1.9V

The ADC12DJ52x0RF device is an RF-sampling, giga-sample, analog-to-digital converter (ADC) that can directly sample input frequencies from DC to above 10GHz. ADC12DJ52x0RF can be configured as a dual-channel, 5.2GSPS ADC or single-channel, 10.4GSPS ADC. Support of a useable input frequency range of up to 10GHz enables direct RF sampling of L-band, S-band, C-band, and X-band for frequency agile systems.

The ADC12DJ52x0RF uses a high-speed JESD204C output interface with up to 16 serialized lanes supporting up to 17.16Gbps line rate. Deterministic latency and multi-device synchronization is supported through JESD204C subclass-1. The JESD204C interface can be configured to trade-off line rate and number of lanes. Both 8b/10b and 64b/66b data encoding schemes are supported. 64b/66b encoding supports forward error correction (FEC) for improved bit error rates. The interface is backwards compatible with JESD204B receivers.

Innovative synchronization features, including noiseless aperture delay adjustment and SYSREF windowing, simplify system design for multi-channel applications. Optional digital down converters (DDCs) are available to provide digital conversion to baseband and to reduce the interface rate. A programmable FIR filter allows on-chip equalization.

The ADC12DJ52x0RF device is an RF-sampling, giga-sample, analog-to-digital converter (ADC) that can directly sample input frequencies from DC to above 10GHz. ADC12DJ52x0RF can be configured as a dual-channel, 5.2GSPS ADC or single-channel, 10.4GSPS ADC. Support of a useable input frequency range of up to 10GHz enables direct RF sampling of L-band, S-band, C-band, and X-band for frequency agile systems.

The ADC12DJ52x0RF uses a high-speed JESD204C output interface with up to 16 serialized lanes supporting up to 17.16Gbps line rate. Deterministic latency and multi-device synchronization is supported through JESD204C subclass-1. The JESD204C interface can be configured to trade-off line rate and number of lanes. Both 8b/10b and 64b/66b data encoding schemes are supported. 64b/66b encoding supports forward error correction (FEC) for improved bit error rates. The interface is backwards compatible with JESD204B receivers.

Innovative synchronization features, including noiseless aperture delay adjustment and SYSREF windowing, simplify system design for multi-channel applications. Optional digital down converters (DDCs) are available to provide digital conversion to baseband and to reduce the interface rate. A programmable FIR filter allows on-chip equalization.
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* Datenblatt ADC12DJ52x0RF 10.4GSPS Single-Channel or 5.2GSPS Dual-Channel, 12-bit, RF-Sampling Analog-to-Digital Converter (ADC) datasheet (Rev. H) PDF | HTML 21.08.2026

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Evaluierungsplatine

ADC12DJ5200RFEVM — ADC12DJ5200RF-Evaluierungsmodul mit RF-Abtast-12-Bit Dual 5,2 GSPS oder Single 10,4 GSPS ADC

Das EVM ADC12DJ5200RF wurde entwickelt, um die ADC12DJ5200RF-Familie von Hochgeschwindigkeits-Analog-Digital-Wandlern (ADCs) auszuwerten. Das EVM ist mit dem ADC12DJ5200RF bestückt, einem 12-Bit, Dual-Kanal 5,2 GSPS oder Einzel-Kanal 10,4 GSPS ADC mit JESD204B-Schnittstelle, und ermöglicht die (...)
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ADC12DJ5200RF-HSACCURACY-CALC — Accuracy calculation for ADC12DJ5200RF with amplifier input

DC accuracy calculator which accounts for ADC and amplifier noise and imperfections.
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