ADS125H02

AKTIV

2-kanaliger Delta-Sigma-ADC, 24 Bit, 40 kSPS, ±20-V-Eingang, PGA, IDACs, GPIOs und VREF

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Datenblatt

document-pdfAcrobat ADS125H02 ±20-V Input, 2-Channel, 40-kSPS, 24-Bit, Delta-Sigma ADC With PGA and Voltage Reference datasheet (Rev. C) (Englisch) PDF | HTML

ADS125H02

AKTIV

Jetzt bestellen

Produktdetails

Resolution (Bits)

24

Sample rate (max) (ksps)

40

Number of input channels

2

Interface type

SPI

Architecture

Delta-Sigma

Input type

Differential, Single-ended

Multichannel configuration

Multiplexed

Rating

Catalog

Reference mode

External, Internal

Input voltage range (max) (V)

15.5

Input voltage range (min) (V)

0

Features

50/60 Hz Rejection, Excitation Current Sources (iDACs), GPIO, Oscillator, PGA, Temp Sensor

Operating temperature range (°C)

-40 to 125

Power consumption (typ) (mW)

45

Analog supply voltage (min) (V)

-18, 0

Analog supply voltage (max) (V)

18, 36

Digital supply (min) (V)

2.7

Digital supply (max) (V)

5.25

Resolution (Bits)

24

Sample rate (max) (ksps)

40

Number of input channels

2

Interface type

SPI

Architecture

Delta-Sigma

Input type

Differential, Single-ended

Multichannel configuration

Multiplexed

Rating

Catalog

Reference mode

External, Internal

Input voltage range (max) (V)

15.5

Input voltage range (min) (V)

0

Features

50/60 Hz Rejection, Excitation Current Sources (iDACs), GPIO, Oscillator, PGA, Temp Sensor

Operating temperature range (°C)

-40 to 125

Power consumption (typ) (mW)

45

Analog supply voltage (min) (V)

-18, 0

Analog supply voltage (max) (V)

18, 36

Digital supply (min) (V)

2.7

Digital supply (max) (V)

5.25

VQFN (RHB)

32

25 mm² (5 mm × 5 mm)

±20-V input, 24-bit delta-sigma ADC
Programmable data rate: 2.5 SPS to 40 kSPS
High-voltage, high-impedance PGA:
- Differential input range: up to ±20 V
- Programmable gain: 0.125 to 128
- Common-mode input voltage: up to ±15.5 V
- Input impedance: 1 GΩ (minimum)
High-performance ADC:
- Input noise: 45 nV_RMS (20 SPS)
- CMRR: 105 dB
- Normal-mode rejection at 50 Hz, 60 Hz: 95 dB
- Offset drift: 5 nV/°C
- Gain drift: 1 ppm/°C
- INL: 2 ppm
Integrated features and diagnostics:
- 2.5-V reference: 3 ppm/°C drift
- Clock oscillator: 2.5% error (maximum)
- Excitation current sources
- GPIO to drive external mux
- Signal and reference voltage monitors
- Cyclic redundancy check (CRC)
Power supplies:
- AVDD: 4.75 V to 5.25 V
- DVDD: 2.7 V to 5.25 V
- HVDD: ±5 V to ±18 V
Operating temperature: –40°C to +125°C
5-mm × 5-mm VQFN package

±20-V input, 24-bit delta-sigma ADC
Programmable data rate: 2.5 SPS to 40 kSPS
High-voltage, high-impedance PGA:
- Differential input range: up to ±20 V
- Programmable gain: 0.125 to 128
- Common-mode input voltage: up to ±15.5 V
- Input impedance: 1 GΩ (minimum)
High-performance ADC:
- Input noise: 45 nV_RMS (20 SPS)
- CMRR: 105 dB
- Normal-mode rejection at 50 Hz, 60 Hz: 95 dB
- Offset drift: 5 nV/°C
- Gain drift: 1 ppm/°C
- INL: 2 ppm
Integrated features and diagnostics:
- 2.5-V reference: 3 ppm/°C drift
- Clock oscillator: 2.5% error (maximum)
- Excitation current sources
- GPIO to drive external mux
- Signal and reference voltage monitors
- Cyclic redundancy check (CRC)
Power supplies:
- AVDD: 4.75 V to 5.25 V
- DVDD: 2.7 V to 5.25 V
- HVDD: ±5 V to ±18 V
Operating temperature: –40°C to +125°C
5-mm × 5-mm VQFN package

The ADS125H02 is a ±20-V input, 24-bit, delta-sigma (ΔΣ) analog-to-digital converter (ADC). The ADC features a low-noise programmable gain amplifier (PGA), an internal reference, clock oscillator, and signal or reference out-of-range monitors.

The integration of a wide input range, ±18-V PGA and an ADC into a single package reduces board area up to 50% compared to discrete solutions.

Programmable gain of 0.125 to 128 (corresponding to an equivalent input range from ±20 V to ±20 mV) eliminates the need for an external attenuator or external gain stages. 1-GΩ minimum input impedance reduces error caused by sensor loading. Additionally, the low noise and low drift performance allow direct connections to bridge, resistance temperature detector (RTD), and thermocouple sensors.

The digital filter attenuates 50-Hz and 60-Hz line cycle noise for data rates ≤ 50 SPS or 60 SPS to reduce measurement error. The filter also provides no-latency conversion data for high data throughput during channel sequencing.

The ADS125H02 is housed in a 5-mm × 5-mm VQFN package and is fully specified over the –40°C to +125°C temperature range.

The ADS125H02 is a ±20-V input, 24-bit, delta-sigma (ΔΣ) analog-to-digital converter (ADC). The ADC features a low-noise programmable gain amplifier (PGA), an internal reference, clock oscillator, and signal or reference out-of-range monitors.

The integration of a wide input range, ±18-V PGA and an ADC into a single package reduces board area up to 50% compared to discrete solutions.

Programmable gain of 0.125 to 128 (corresponding to an equivalent input range from ±20 V to ±20 mV) eliminates the need for an external attenuator or external gain stages. 1-GΩ minimum input impedance reduces error caused by sensor loading. Additionally, the low noise and low drift performance allow direct connections to bridge, resistance temperature detector (RTD), and thermocouple sensors.

The digital filter attenuates 50-Hz and 60-Hz line cycle noise for data rates ≤ 50 SPS or 60 SPS to reduce measurement error. The filter also provides no-latency conversion data for high data throughput during channel sequencing.

The ADS125H02 is housed in a 5-mm × 5-mm VQFN package and is fully specified over the –40°C to +125°C temperature range.

filter

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Technische Dokumentation

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Design und Entwicklung

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Evaluierungsplatine

ADS125H02EVM — ADS125H02-Evaluierungsmodul

Das ADS125H02-Evaluierungsmodul (EVM) ist eine Plattform zur Evaluierung des ADS125H02-Analog-Digital-Wandlers (ADC). Der ADS125H02 ist ein Delta-Sigma (ΔΣ)-ADC mit großem Eingangsspannungsbereich, 24 Bit, 19,2 kSPS, integriertem PGA, Spannungsreferenz und interner Fehlerüberwachung. Die (...)

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