ADS125H18
16-Kanal-Delta-Sigma-ADC mit Hochspannungseingängen (±10 V) und 5-V-Stromversorgung, 24 Bit, 1 MS
ADS125H18
- Programmable data rate up to 1.067MSPS
- High impedance voltage divider with integrated precision matched resistors
- Analog multiplexer with 17 independently selectable inputs:
- Up to 8 fully differential inputs
- Up to 16 single ended inputs
- Rail-to-rail analog input buffer and reference buffer
- Internal voltage reference, selectable output 2.5V or 4.096V
- Fault detection and monitor circuits
- General-Purpose I/Os
- Internal Oscillator: 25.6MHz, 1% Accuracy
- Channel auto-sequencer and FIFO buffer
- Simultaneous 50Hz and 60Hz rejection at ≤ 25 SPS with low-latency digital filter
- Power-scalable architecture with four speed modes
The ADS125H18 is a high voltage input, multiplexed 8/16-Channel, 24 bit, delta-sigma (ΔΣ), analog-to-digital converter (ADC) with data rates up to 1MSPS and is configurable to accept up to 8 fully differential analog inputs or up to 16 single-ended analog inputs. Each input comprises a high-impedance voltage divider with integrated precision matched resistors to scale down the input voltage to the input range of the ADC. The device offers an excellent combination of ac performance and dc precision with low power consumption.
The ADS125H18 is equipped with a channel auto-sequencer and a FIFO (first-in, first-out) buffer. The power-scalable architecture provides four speed modes to optimize data rate, resolution, and power consumption.
The small 5mm × 5mm VQFN package is designed for limited space applications. The device is fully specified for operation over the –40°C to +125°C temperature range.
Technische Dokumentation
| Top-Dokumentation | Typ | Titel | Format-Optionen | Datum |
|---|---|---|---|---|
| * | Data sheet | ADS125H18 8/16-Channel, 1MSPS , 24 -Bit, Delta-Sigma ADC datasheet | PDF | HTML | 16 Dez 2025 |
| Circuit design | Precision, ±15V Power Supply Circuit from a +5V Source for High-Voltage Data Converters | PDF | HTML | 04 Dez 2025 | |
| Circuit design | 4-Ch, diff. in., DAQ front-end circuit w/ configurable voltage & current inputs (Rev. A) | PDF | HTML | 19 Sep 2024 | |
| Application note | Calculating Conversion Latency and System Cycle Time for Delta-Sigma ADCs (Rev. A) | PDF | HTML | 18 Mär 2024 | |
| Application note | Digital Filter Types in Delta-Sigma ADCs (Rev. A) | PDF | HTML | 29 Mär 2023 | |
| Product overview | PLC Analog Input Front-End Architectures | PDF | HTML | 31 Jul 2022 | |
| E-book | Fundamentals of Precision ADC Noise Analysis (Rev. A) | 19 Jun 2020 |
Design und Entwicklung
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ADS125H18EVM-PDK — ADS125H18 – Evaluierungsmodul
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| Gehäuse | Pins | CAD-Symbole, Footprints und 3D-Modelle |
|---|---|---|
| VQFN (RHB) | 36 | Ultra Librarian |
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