Gehäuseinformationen
| Gehäuse | Pins SOIC (DW) | 28 |
| Betriebstemperaturbereich (°C) 0 to 70 |
| Gehäusemenge | Träger 1.000 | LARGE T&R |
Merkmale von BQ4845
- Real-Time Clock counts seconds through years in BCD format
- On-chip battery-backup switchover circuit with nonvolatile control for external SRAM
- Less than 500nA of clock operation current in backup mode
- Microprocessor reset valid to VCC =VSS
- Independent watchdog timer with a programmable time-out period
- Power-fail interrupt warning
- Programmable clock alarm interrupt active in battery-backup mode
- Programmable periodic interrupt
- Battery-low warning
Beschreibung von BQ4845
The bq4845 Real-Time Clock is a low-power microprocessor peripheral that integrates a time-of-day clock, a 100-year calendar, and a CPU supervisor in a 28-pin SOIC or DIP. The bq4845 is ideal for fax machines, copiers, industrial control systems, point-of-sale terminals, data loggers, and computers.
The bq4845 provides direct connections for a 32.768KHz quartz crystal and a 3V backup battery. Through the use of the conditional chip enable output (CE\OUT) and battery voltage output (VOUT) pins, the bq4845 can write-protect and make nonvolatile external SRAMs. The backup cell powers the real-time clock and maintains SRAM information in the absence of system voltage.
The bq4845 contains a temperature-compensated reference and comparator circuit that monitors the status of its voltage supply. When the bq4845 detects an out-of-tolerance condition, it generates an interrupt warning and subsequently a microprocessor reset. The reset stays active for 200ms after VCC rises within tolerance, to allow for power supply and processor stabilization.
The bq4845 also has a built-in watchdog timer to monitor processor operation. If the microprocessor does not toggle the watchdog input (WDI) within the programmed time-out period, the bq4845 asserts WDO\ and RST\. WDI unconnected disables the watchdog timer.
The bq4845 can generate other interrupts based on a clock alarm condition or a periodic setting. The alarm interrupt can be set to occur from once per second to once per month. The alarm can be made active in the battery-backup mode to serve as a system wake-up call. For interrupts at a rate beyond once per second, the periodic interrupt can be programmed with periods of 30.5us to 500ms.