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Gleiche Funktionalität, andere Pinbelegung als verglichener Baustein
DAC53202 AKTIV Intelligenter DAC, 10 Bit, 2 Kanäle, Spannungs-/Stromausgang, mit Hi-Z, EEPROM und Wellenformgenerat 10-bit, 3mm × 3mm package with integrated reference

Produktdetails

Resolution (Bits) 8 Number of DAC channels 2 Interface type SPI Output type Buffered Voltage Settling time (µs) 4.5 Features Cost Optimized, Low Power, Small Size Reference type Ext Architecture String Rating Catalog Output range (max) (mA/V) 5.5 Output range (min) (mA/V) 0 Sample/update rate (Msps) 2.5 Power consumption (typ) (mW) 0.6 Operating temperature range (°C) -40 to 105
Resolution (Bits) 8 Number of DAC channels 2 Interface type SPI Output type Buffered Voltage Settling time (µs) 4.5 Features Cost Optimized, Low Power, Small Size Reference type Ext Architecture String Rating Catalog Output range (max) (mA/V) 5.5 Output range (min) (mA/V) 0 Sample/update rate (Msps) 2.5 Power consumption (typ) (mW) 0.6 Operating temperature range (°C) -40 to 105
VSSOP (DGS) 10 14.7 mm² 3 x 4.9 WSON (DSC) 10 9 mm² 3 x 3
  • Ensured Monotonicity
  • Low Power Operation
  • Rail-to-Rail Voltage Output
  • Power-On Reset to 0 V
  • Simultaneous Output Updating
  • Wide Power Supply Range: 2.7 V to 5.5 V
  • Industry’s Smallest Package
  • Power-Down Modes
  • Key Specifications:
    • Resolution: 8 Bits
    • INL: ±0.5 LSB (Maximum)
    • DNL: 0.18 / –0.13 LSB (Maximum)
    • Settling Time: 4.5 µs (Maximum)
    • Zero Code Error: 15 mV (Maximum)
    • Full-Scale Error: –0.75% FS (Maximum)
    • Supply Power:
      • Normal: 0.6 mW (3 V) / 1.6 mW (5 V)
        (Typical)
      • Power Down: 0.3 µW (3 V) / 0.8 µW (5 V)
        (Typical)
  • Ensured Monotonicity
  • Low Power Operation
  • Rail-to-Rail Voltage Output
  • Power-On Reset to 0 V
  • Simultaneous Output Updating
  • Wide Power Supply Range: 2.7 V to 5.5 V
  • Industry’s Smallest Package
  • Power-Down Modes
  • Key Specifications:
    • Resolution: 8 Bits
    • INL: ±0.5 LSB (Maximum)
    • DNL: 0.18 / –0.13 LSB (Maximum)
    • Settling Time: 4.5 µs (Maximum)
    • Zero Code Error: 15 mV (Maximum)
    • Full-Scale Error: –0.75% FS (Maximum)
    • Supply Power:
      • Normal: 0.6 mW (3 V) / 1.6 mW (5 V)
        (Typical)
      • Power Down: 0.3 µW (3 V) / 0.8 µW (5 V)
        (Typical)

The DAC082S085 device is a full-featured, general-purpose, DUAL, 8-bit, voltage-output, digital-to-analog converter (DAC) that can operate from a single 2.7-V to 5.5-V supply and consumes 0.6 mW at 3 V and 1.6 mW at 5 V. The DAC082S085 is packaged in 10-pin SON and VSSOP packages. The 10-pin WSON package makes the DAC082S085 the smallest DUAL DAC in its class. The on-chip output amplifier allows rail-to-rail output swing, and the three-wire serial interface operates at clock rates up to 40 MHz over the entire supply voltage range. Competitive devices are limited to 25-MHz clock rates at supply voltages in the 2.7 V to 3.6 V range. The serial interface is compatible with standard SPI™, QSPI, MICROWIRE, and DSP interfaces.

The DAC082S085 device is a full-featured, general-purpose, DUAL, 8-bit, voltage-output, digital-to-analog converter (DAC) that can operate from a single 2.7-V to 5.5-V supply and consumes 0.6 mW at 3 V and 1.6 mW at 5 V. The DAC082S085 is packaged in 10-pin SON and VSSOP packages. The 10-pin WSON package makes the DAC082S085 the smallest DUAL DAC in its class. The on-chip output amplifier allows rail-to-rail output swing, and the three-wire serial interface operates at clock rates up to 40 MHz over the entire supply voltage range. Competitive devices are limited to 25-MHz clock rates at supply voltages in the 2.7 V to 3.6 V range. The serial interface is compatible with standard SPI™, QSPI, MICROWIRE, and DSP interfaces.

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Technische Dokumentation

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Typ Titel Datum
* Data sheet DAC082S085 8-Bit Micro Power DUAL Digital-to-Analog Converter With Rail-to-Rail Output datasheet (Rev. G) PDF | HTML 30 Jun 2016
Application note AN-2001 Daisy Chaining Precision DACs (Rev. A) 01 Mai 2013
User guide 8,10,12-Bit Dual/Quad DAC with Rail-to-Rail Output User Guide 23 Feb 2012
White paper Optimizing Portable Applications with D/A Converters 01 Sep 2006

Design und Entwicklung

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Simulationsmodell

DAC082S085 IBIS MODEL

SLAM248.ZIP (11 KB) - IBIS Model
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Referenzdesigns

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Gehäuse Pins CAD-Symbole, Footprints und 3D-Modelle
VSSOP (DGS) 10 Ultra Librarian
WSON (DSC) 10 Ultra Librarian

Bestellen & Qualität

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  • Blei-Finish/Ball-Material
  • MSL-Rating / Spitzenrückfluss
  • MTBF-/FIT-Schätzungen
  • Materialinhalt
  • Qualifikationszusammenfassung
  • Kontinuierliches Zuverlässigkeitsmonitoring
Beinhaltete Information:
  • Werksstandort
  • Montagestandort

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