Gehäuseinformationen
| Gehäuse | Pins TSSOP (DGG) | 56 |
| Betriebstemperaturbereich (°C) -40 to 85 |
| Gehäusemenge | Träger 2.000 | LARGE T&R |
Merkmale von SN74ABT16823
- Members of the Texas Instruments WidebusTM Family
- State-of-the-Art EPIC-IIBTM BiCMOS Design Significantly Reduces Power Dissipation
- High-Impedance State During Power Up and Power Down
- ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
- Typical VOLP (Output Ground Bounce) < 1 V at VCC = 5 V, TA = 25°C
- Distributed VCC and GND Pin Configuration Minimizes High-Speed Switching Noise
- Flow-Through Architecture Optimizes PCB Layout
- High-Drive Outputs (-32-mA IOH, 64-mA IOL)
- Package Options Include Plastic 300-mil Shrink Small-Outline (DL), Thin Shrink Small-Outline (DGG) Packages and 380-mil Fine-Pitch Ceramic Flat (WD) Package Using 25-mil Center-to-Center Spacings
Widebus and EPIC-IIB are trademarks of Texas Instruments Incorporated.
Beschreibung von SN74ABT16823
These 18-bit flip-flops feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing wider buffer registers, I/O ports, bidirectional bus drivers with parity, and working registers.
The 'ABT16823 can be used as two 9-bit flip-flops or one 18-bit
flip-flop. With the clock-enable (
) input low, the D-type flip-flops enter data on the
low-to-high transitions of the clock. Taking high disables the clock buffer,
latching the outputs. Taking the clear (
) input low causes the Q outputs to
go low independently of the clock.
A buffered output-enable (
) input can be used to place the nine outputs in either
a normal logic state (high or low logic level) or a high-impedance
state. In the high-impedance state, the outputs neither load nor
drive the bus lines significantly. The high-impedance state and
increased drive provide the capability to drive bus lines without
need for interface or pullup components.
does not affect
the internal operation of the flip-flops. Old data can be retained or
new data can be entered while the outputs are in the high-impedance
state.
When VCC is between 0 and 2.1 V, the device is in the
high-impedance state during power up or power down. However, to
ensure the high-impedance state above 2.1 V, should be tied to VCC
through a pullup resistor; the minimum value of the resistor is
determined by the current-sinking/current-sourcing capability of the
driver.
The SN54ABT16823 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ABT16823 is characterized for operation from -40°C to 85°C.