Home Mikrocontroller (MCUs) & Prozessoren Mikroprozessoren & DSPs Audio- & Radar-DSP-SoCs
Home
Mikrocontroller (MCUs) & Prozessoren
Mikroprozessoren & DSPs
Audio- & Radar-DSP-SoCs

TMS320C6701

AKTIV

C67x Fließkomma-DSP – bis zu 167MHz, McBSP

Jetzt bestellen
Datenblatt

TMS320C6701

AKTIV
Datenblatt Jetzt bestellen

Produktdetails

CPU 32-/64-bit Operating system DSP/BIOS Rating Catalog Operating temperature range (°C) -40 to 105
CPU 32-/64-bit Operating system DSP/BIOS Rating Catalog Operating temperature range (°C) -40 to 105
FCBGA (GJC) 352 1225 mm² (35 mm × 35 mm)
  • Highest Performance Floating-Point Digital Signal Processor (DSP) TMS320C6701
    • 8.3-, 6.7-, 6-ns Instruction Cycle Time
    • 120-, 150-, 167-MHz Clock Rate
    • Eight 32-Bit Instructions/Cycle
    • 1 GFLOPS
    • TMS320C6201 Fixed-Point DSP Pin-Compatible
  • VelociTI™ Advanced Very Long Instruction Word (VLIW) C67x™ CPU Core
    • Eight Highly Independent Functional Units:
      • Four ALUs (Floating- and Fixed-Point)
      • Two ALUs (Fixed-Point)
      • Two Multipliers (Floating- and Fixed-Point)
    • Load-Store Architecture With 32 32-Bit General-Purpose Registers
    • Instruction Packing Reduces Code Size
    • All Instructions Conditional
  • Instruction Set Features
    • Hardware Support for IEEE Single-Precision Instructions
    • Hardware Support for IEEE Double-Precision Instructions
    • Byte-Addressable (8-, 16-, 32-Bit Data)
    • 8-Bit Overflow Protection
    • Saturation
    • Bit-Field Extract, Set, Clear
    • Bit-Counting
    • Normalization
  • 1M-Bit On-Chip SRAM
    • 512K-Bit Internal Program/Cache (16K 32-Bit Instructions)
    • 512K-Bit Dual-Access Internal Data (64K Bytes)
  • 32-Bit External Memory Interface (EMIF) to Synchronous/Asynchronous Memories
    • Glueless Interface to Synchronous Memories: SDRAM and SBSRAM
    • Glueless Interface to Asynchronous Memories: SRAM and EPROM
    • 52M-Byte Addressable External Memory Space
  • Four-Channel Bootloading Direct-Memory-Access (DMA) Controller With an Auxiliary Channel
  • 16-Bit Host-Port Interface (HPI)
    • Access to Entire Memory Map
  • Two Multichannel Buffered Serial Ports (McBSPs)
    • Direct Interface to T1/E1, MVIP, SCSA Framers
    • ST-Bus-Switching Compatible
    • Up to 256 Channels Each
    • AC97-Compatible
    • Serial-Peripheral-Interface (SPI) Compatible (Motorola™)
  • Two 32-Bit General-Purpose Timers
  • Flexible Phase-Locked-Loop (PLL) Clock Generator
  • IEEE-1149.1 (JTAG) Boundary-Scan-Compatible
  • 352-Pin Ball Grid Array (BGA) Package (GJC Suffix)
  • 0.18-µm/5-Level Metal Process
    • CMOS Technology
  • 3.3-V I/Os, 1.8-V Internal (120-, 150-MHz)
  • 3.3-V I/Os, 1.9-V Internal (167-MHz Only)

VelociTI is a trademark of Texas Instruments.
Motorola is a trademark of Motorola, Inc.
IEEE Standard 1149.1-1990 Standard-Test-Access Port and Boundary Scan Architecture.
TMS320C6000 is a trademark of Texas Instruments.
Windows is a registered trademark of Microsoft Corporation.
  • Highest Performance Floating-Point Digital Signal Processor (DSP) TMS320C6701
    • 8.3-, 6.7-, 6-ns Instruction Cycle Time
    • 120-, 150-, 167-MHz Clock Rate
    • Eight 32-Bit Instructions/Cycle
    • 1 GFLOPS
    • TMS320C6201 Fixed-Point DSP Pin-Compatible
  • VelociTI™ Advanced Very Long Instruction Word (VLIW) C67x™ CPU Core
    • Eight Highly Independent Functional Units:
      • Four ALUs (Floating- and Fixed-Point)
      • Two ALUs (Fixed-Point)
      • Two Multipliers (Floating- and Fixed-Point)
    • Load-Store Architecture With 32 32-Bit General-Purpose Registers
    • Instruction Packing Reduces Code Size
    • All Instructions Conditional
  • Instruction Set Features
    • Hardware Support for IEEE Single-Precision Instructions
    • Hardware Support for IEEE Double-Precision Instructions
    • Byte-Addressable (8-, 16-, 32-Bit Data)
    • 8-Bit Overflow Protection
    • Saturation
    • Bit-Field Extract, Set, Clear
    • Bit-Counting
    • Normalization
  • 1M-Bit On-Chip SRAM
    • 512K-Bit Internal Program/Cache (16K 32-Bit Instructions)
    • 512K-Bit Dual-Access Internal Data (64K Bytes)
  • 32-Bit External Memory Interface (EMIF) to Synchronous/Asynchronous Memories
    • Glueless Interface to Synchronous Memories: SDRAM and SBSRAM
    • Glueless Interface to Asynchronous Memories: SRAM and EPROM
    • 52M-Byte Addressable External Memory Space
  • Four-Channel Bootloading Direct-Memory-Access (DMA) Controller With an Auxiliary Channel
  • 16-Bit Host-Port Interface (HPI)
    • Access to Entire Memory Map
  • Two Multichannel Buffered Serial Ports (McBSPs)
    • Direct Interface to T1/E1, MVIP, SCSA Framers
    • ST-Bus-Switching Compatible
    • Up to 256 Channels Each
    • AC97-Compatible
    • Serial-Peripheral-Interface (SPI) Compatible (Motorola™)
  • Two 32-Bit General-Purpose Timers
  • Flexible Phase-Locked-Loop (PLL) Clock Generator
  • IEEE-1149.1 (JTAG) Boundary-Scan-Compatible
  • 352-Pin Ball Grid Array (BGA) Package (GJC Suffix)
  • 0.18-µm/5-Level Metal Process
    • CMOS Technology
  • 3.3-V I/Os, 1.8-V Internal (120-, 150-MHz)
  • 3.3-V I/Os, 1.9-V Internal (167-MHz Only)

VelociTI is a trademark of Texas Instruments.
Motorola is a trademark of Motorola, Inc.
IEEE Standard 1149.1-1990 Standard-Test-Access Port and Boundary Scan Architecture.
TMS320C6000 is a trademark of Texas Instruments.
Windows is a registered trademark of Microsoft Corporation.

The TMS320C67x DSPs are the floating-point DSP family in the TMS320C6000™ DSP platform. The TMS320C6701 (C6701) device is based on the high-performance, advanced VelociTI very-long-instruction-word (VLIW) architecture developed by Texas Instruments (TI), making this DSP an excellent choice for multichannel and multifunction applications. With performance of up to 1 giga floating-point operations per second (GFLOPS) at a clock rate of 167 MHz, the C6701 offers cost-effective solutions to high-performance DSP programming challenges. The C6701 DSP possesses the operational flexibility of high-speed controllers and the numerical capability of array processors. This processor has 32 general-purpose registers of 32-bit word length and eight highly independent functional units. The eight functional units provide four floating-/fixed-point ALUs, two fixed-point ALUs, and two floating-/fixed-point multipliers. The C6701 can produce two multiply-accumulates (MACs) per cycle for a total of 334 million MACs per second (MMACS). The C6701 DSP also has application-specific hardware logic, on-chip memory, and additional on-chip peripherals.

The C6701 includes a large bank of on-chip memory and has a powerful and diverse set of peripherals. Program memory consists of a 64K-byte block that is user-configurable as cache or memory-mapped program space. Data memory consists of two 32K-byte blocks of RAM. The peripheral set includes two multichannel buffered serial ports (McBSPs), two general-purpose timers, a host-port interface (HPI), and a glueless external memory interface (EMIF) capable of interfacing to SDRAM or SBSRAM and asynchronous peripherals.

The C6701 has a complete set of development tools which includes: a new C compiler, an assembly optimizer to simplify programming and scheduling, and a Windows™ debugger interface for visibility into source code execution.

The TMS320C67x DSPs are the floating-point DSP family in the TMS320C6000™ DSP platform. The TMS320C6701 (C6701) device is based on the high-performance, advanced VelociTI very-long-instruction-word (VLIW) architecture developed by Texas Instruments (TI), making this DSP an excellent choice for multichannel and multifunction applications. With performance of up to 1 giga floating-point operations per second (GFLOPS) at a clock rate of 167 MHz, the C6701 offers cost-effective solutions to high-performance DSP programming challenges. The C6701 DSP possesses the operational flexibility of high-speed controllers and the numerical capability of array processors. This processor has 32 general-purpose registers of 32-bit word length and eight highly independent functional units. The eight functional units provide four floating-/fixed-point ALUs, two fixed-point ALUs, and two floating-/fixed-point multipliers. The C6701 can produce two multiply-accumulates (MACs) per cycle for a total of 334 million MACs per second (MMACS). The C6701 DSP also has application-specific hardware logic, on-chip memory, and additional on-chip peripherals.

The C6701 includes a large bank of on-chip memory and has a powerful and diverse set of peripherals. Program memory consists of a 64K-byte block that is user-configurable as cache or memory-mapped program space. Data memory consists of two 32K-byte blocks of RAM. The peripheral set includes two multichannel buffered serial ports (McBSPs), two general-purpose timers, a host-port interface (HPI), and a glueless external memory interface (EMIF) capable of interfacing to SDRAM or SBSRAM and asynchronous peripherals.

The C6701 has a complete set of development tools which includes: a new C compiler, an assembly optimizer to simplify programming and scheduling, and a Windows™ debugger interface for visibility into source code execution.
filter Andere Audio- & Radar-DSP-SoCs suchen
Herunterladen Video mit Transkript ansehen Video
Keine Designunterstützung von TI verfügbar

Für dieses Produkt gibt es keine laufende Designunterstützung von TI für neue Projekte wie neue Inhalte oder Software-Updates. Wenn verfügbar, finden Sie im Produktordner relevante Begleitmaterialien, Software und Tools. Sie können auch in den TI E2ETM Supportforen nach archivierten Informationen suchen.

Technische Dokumentation

Keine Ergebnisse gefunden. Bitte geben Sie einen anderen Begriff ein und versuchen Sie es erneut.
Alle anzeigen 50
Top-Dokumentation Typ Titel Format-Optionen Neueste englische Version herunterladen Datum
* Datenblatt TMS320C6701 Floating-Point DSP datasheet (Rev. F) 01.03.2004
* Errata TMS320C6701 Silicon Errata (Rev. A) 31.01.2001
Anwendungshinweis How to Migrate CCS 3.x Projects to the Latest CCS (Rev. A) PDF | HTML 19.05.2021
Anwendungshinweis Introduction to TMS320C6000 DSP Optimization 06.10.2011
Benutzerhandbuch TMS320C6000 DSP Peripherals Overview Reference Guide (Rev. Q) 02.07.2009
Anwendungshinweis TMS320C6000 EMIF-to-External SDRAM Interface (Rev. E) 04.09.2007
Anwendungshinweis Thermal Considerations for the DM64xx, DM64x, and C6000 Devices 20.05.2007
Benutzerhandbuch TMS320C6000 DSP External Memory Interface (EMIF) Reference Guide (Rev. E) 11.04.2007
Benutzerhandbuch TMS320C6000 DSP Multichannel Buffered Serial Port (McBSP) Reference Guide (Rev. G) 14.12.2006
Benutzerhandbuch TMS320C67x/C67x+ DSP CPU and Instruction Set Reference Guide (Rev. A) 07.11.2006
Benutzerhandbuch TMS320C6000 DSP Host-Post Interface (HPI) Reference Guide (Rev. C) 01.01.2006
Benutzerhandbuch TMS320C6000 DSP Power-Down Logic and Modes Reference Guide (Rev. C) 01.03.2005
Benutzerhandbuch TMS320C6000 DSP 32-bit Timer Reference Guide (Rev. B) 25.01.2005
Benutzerhandbuch TMS320C620x/C670x DSP Program & Data Memory Controller/DMA Controller Ref.Guide (Rev. A) 03.09.2004
Benutzerhandbuch TMS320C6000 Chip Support Library API Reference Guide (Rev. J) 13.08.2004
Anwendungshinweis TMS320C6000 Tools: Vector Table and Boot ROM Creation (Rev. D) 26.04.2004
Anwendungshinweis TMS320C6000 Board Design: Considerations for Debug (Rev. C) 21.04.2004
Anwendungshinweis TMS320C6000 McBSP Initialization (Rev. C) 08.03.2004
Benutzerhandbuch TMS320C6000 DSP Interrupt Selector Reference Guide (Rev. A) 09.01.2004
Benutzerhandbuch TMS320C6000 DSP Designing for JTAG Emulation Reference Guide 31.07.2003
Benutzerhandbuch TMS320C620x/C670x DSP Boot Modes and Configuration Reference Guide 31.07.2003
Anwendungshinweis How to Begin Development Today w/ High Performance Floating Point TMS320C67x DSP 23.04.2003
Anwendungshinweis Using IBIS Models for Timing Analysis (Rev. A) 15.04.2003
Benutzerhandbuch TMS320C6201/6701 Evaluation Module User's Guide (Rev. F) 13.08.2002
Anwendungshinweis TMS320C62x/C67x Power Consumption Summary (Rev. C) 30.07.2002
Anwendungshinweis TMS320C6000 McBSP Interface to an ST-BUS Device (Rev. B) 04.06.2002
Anwendungshinweis TMS320C6000 HPI to PCI Interfacing Using the PLX PCI9050 (Rev. C) 17.04.2002
Anwendungshinweis TMS320C6000 DMA Example Applications (Rev. A) 10.04.2002
Anwendungshinweis TMS320C6000 Board Design for JTAG (Rev. C) 02.04.2002
Anwendungshinweis TMS320C6000 Memory Test (Rev. A) 19.02.2002
Anwendungshinweis TMS320C6000 EMIF to External Flash Memory (Rev. A) 13.02.2002
Anwendungshinweis Using a TMS320C6000 McBSP for Data Packing (Rev. A) 31.10.2001
Anwendungshinweis Interfacing theTMS320C6000 EMIFto a PCI Bus Using the AMCC S5933 PCI Controller (Rev. A) 30.09.2001
Anwendungshinweis TMS320C6000 Host Port to MC68360 Interface (Rev. A) 30.09.2001
Anwendungshinweis Using the TMS320C6000 McBSP as a High Speed Communication Port (Rev. A) 31.08.2001
Anwendungshinweis TMS320C6000 Host Port to the i80960 Microprocessors Interface (Rev. A) 31.08.2001
Anwendungshinweis TMS320C6000 EMIF to External Asynchronous SRAM Interface (Rev. A) 31.08.2001
Anwendungshinweis TMS320C6000 System Clock Circuit Example (Rev. A) 15.08.2001
Anwendungshinweis TMS320C6201/6701 EVM: TMS320C6000 McBSP to Multimedia Audio Codec (Rev. A) 24.07.2001
Anwendungshinweis TMS320C6000 McBSP to Voice Band Audio Processor (VBAP) Interface (Rev. A) 23.07.2001
Anwendungshinweis TMS320C6000 McBSP: AC'97 Codec Interface (TLV320AIC27) (Rev. A) 10.07.2001
Anwendungshinweis TMS320C6000 McBSP: Interface to SPI ROM (Rev. C) 30.06.2001
Anwendungshinweis TMS320C6000 Host Port to MPC860 Interface (Rev. A) 21.06.2001
Anwendungshinweis TMS320C6000 McBSP: IOM-2 Interface (Rev. A) 21.05.2001
Anwendungshinweis Circular Buffering on TMS320C6000 (Rev. A) 12.09.2000
Anwendungshinweis TMS320C6000 McBSP as a TDM Highway (Rev. A) 11.09.2000
Anwendungshinweis TMS320C620x/TMS3206701 DMA and CPU: Data Access Performance (Rev. A) 16.08.2000
Anwendungshinweis TMS320C6000 u-Law and a-Law Companding with Software or the McBSP 02.02.2000
Anwendungshinweis TMS320C6000 C Compiler: C Implementation of Intrinsics 07.12.1999
Anwendungshinweis TMS320C6000 McBSP: I2S Interface 08.09.1999

Design und Entwicklung

Weitere Bedingungen oder erforderliche Ressourcen enthält gegebenenfalls die Detailseite, die Sie durch Klicken auf einen der unten stehenden Titel erreichen.

Debug-Tastkopf

TMDSEMU560V2STM-U — XDS560™-Software v2 – System-Trace-USB-Debug-Sonde

XDS560v2 ist die Debug-Sonde mit der höchsten Leistung der XDS560™-Produktfamilie und unterstützt sowohl den herkömmlichen JTAG-Standard (IEEE1149.1) als auch cJTAG (IEEE1149.7).  Beachten Sie, dass das Serial Wire Debugging (SWD) nicht unterstützt wird.

Alle XDS-Debug-Sonden unterstützen Core- und (...)

Unterstützte Produkte und Hardware
Vorrätig
Limit:
??asset.out-of-stock-ti_de_DE??
Nicht verfügbar
Debug-Tastkopf

TMDSEMU560V2STM-UE — XDS560v2 System-Trace-USB-und Ethernet-Debug-Tastkopf

The XDS560v2 is the highest performance of the XDS family of debug probes and supports both the traditional JTAG standard (IEEE1149.1) and cJTAG (IEEE1149.7). Note that it does not support serial wire debug (SWD).

All XDS debug probes support Core and System Trace in all ARM and DSP processors that (...)

Unterstützte Produkte und Hardware
Vorrätig
Limit:
??asset.out-of-stock-ti_de_DE??
Nicht verfügbar
Debug-Tastkopf

LB-3P-TRACE32-DSP — Debug- und Trace-System Lauterbach TRACE32 für digitale Signalprozessoren (Digital Signal Processors

Lauterbach‘s TRACE32® tools are a suite of leading-edge hardware and software components that enables developers to analyze, optimize and certify all kinds of single- or multi-core Digital Signal processors (DSPs) which are a popular choice for audio and video processing as well as radar data (...)

Von: Lauterbach GmbH
Unterstützte Produkte und Hardware
IDE, Konfiguration, Compiler oder Debugger

CCSTUDIO — Code Composer Studio integrated development environment (IDE)

CCStudio™ IDE is part of TI's extensive CCStudio™ development ecosystem and is an integrated development environment for TI's microcontrollers, processors, wireless connectivity devices, and radar sensors. CCStudio IDE is available as desktop or cloud-based applications. The cloud version (...)

Unterstützte Produkte und Hardware
Treiber oder Bibliothek

AEC-AER — Acoustic echo cancellation/removal for TI C64x+, C674x, C55x and Cortex®-A8 processors

Voice Library - VoLIB provides components that, together, facilitate the development of the signal processing chain for Voice over IP applications such as infrastructure, enterprise, residential gateways and IP phones. Together with optimized implementations of ITU-T voice codecs, that can be (...)

Unterstützte Produkte und Hardware
Treiber oder Bibliothek

C64X-DSPLIB — Download TMS320C64x DSP Library

Die digitale Signalprozessorbibliothek (Digital Signal Processor Library, DSPLIB) TMS320C6000 ist eine plattformoptimierte DSP-Funktionsbibliothek für C-Programmierer. Sie enthält in C aufrufbare, universelle Signalverarbeitungsroutinen, die für gewöhnlich in rechenintensiven Echtzeitanwendungen (...)

Unterstützte Produkte und Hardware
Treiber oder Bibliothek

C67X-DSPLIB — Download TMS320C67x DSP Library

Die digitale Signalprozessorbibliothek (Digital Signal Processor Library, DSPLIB) TMS320C6000 ist eine plattformoptimierte DSP-Funktionsbibliothek für C-Programmierer. Sie enthält in C aufrufbare, universelle Signalverarbeitungsroutinen, die für gewöhnlich in rechenintensiven Echtzeitanwendungen (...)

Unterstützte Produkte und Hardware
Treiber oder Bibliothek

C67X-MATHLIB — DSP Math Library for C67x Floating Point Devices

The Texas Instruments math library is an optimized floating-point math function library for C programmers using TI floating point devices. These routines are typically used in computationally intensive real-time applications where optimal execution speed is critical. By using these routines instead (...)
Unterstützte Produkte und Hardware
Treiber oder Bibliothek

FAXLIB — FAX library (FAXLIB) for C66x, C64x+ and C55x processors

Voice Library - VoLIB provides components that, together, facilitate the development of the signal processing chain for Voice over IP applications such as infrastructure, enterprise, residential gateways and IP phones. Together with optimized implementations of ITU-T voice codecs, that can be (...)

Unterstützte Produkte und Hardware
Treiber oder Bibliothek

SPRC090 — Download TMS320C6000 Chip Support Library

Die Chip-Unterstützungsbibliotheken (Chip Support Library, CSL) bietet ein Application Programming Interface (API) zum Konfigurieren und Steuern der integrierten DSP-Peripheriebausteine, um die Entwicklung zu vereinfachen, die Kompatibilität zwischen verschiedenen C6000-Bausteinen zu gewährleisten (...)
Unterstützte Produkte und Hardware
Treiber oder Bibliothek

VOLIB — Voice library (VoLIB) for C66x, C64x+ and C55x processors

Voice Library - VoLIB provides components that, together, facilitate the development of the signal processing chain for Voice over IP applications such as infrastructure, enterprise, residential gateways and IP phones. Together with optimized implementations of ITU-T voice codecs, that can be (...)

Unterstützte Produkte und Hardware
Simulationsmodell

C6701 GJC BSDL Model (Rev. A)

SPRM040 (4 KB) - BSDL-Modell
Unterstützte Produkte und Hardware
Simulationsmodell

C6701 GJC IBIS Model

SPRM019.ZIP (7 KB) - IBIS-Modell
Unterstützte Produkte und Hardware
Gehäuse Pins CAD-Symbole, Footprints und 3D-Modelle
FCBGA (GJC) 352 Ultra Librarian
Es gelten die allgemeinen Geschäftsbedingungen von TI für Evaluierungsartikel.

Bestellen & Qualität

Support und Schulungen

TI E2E™-Foren mit technischem Support von TI-Ingenieuren

Alle Forenthemen auf Englisch anzeigen

Inhalte werden ohne Gewähr von TI und der Community bereitgestellt. Sie stellen keine Spezifikationen von TI dar. Siehe Nutzungsbedingungen.

Bei Fragen zu den Themen Qualität, Gehäuse oder Bestellung von TI-Produkten siehe TI-Support. ​​​​​​​​​​​​​​

Videos