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AM3358

ACTIVO

Procesador Sitara: ARM Cortex-A8, gráficos 3D, PRU-ICSS, CAN

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AM3358

ACTIVO
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Detalles del producto

CPU 1 Arm Cortex-A8 Frequency (MHz) 600, 800, 1000 Graphics acceleration 1 3D Display type 1 LCD Protocols EtherNet/IP, Ethernet, Profibus, Profinet, Sercos Hardware accelerators Industrial communications subsystem, Programable real-time unit, Security Accelerator Features General purpose, Networking Operating system Linux, RTOS Security Cryptographic acceleration, Device attestation & anti-counterfeit Rating Catalog Power supply solution TPS65216, TPS65218D0 Operating temperature range (°C) -40 to 105
CPU 1 Arm Cortex-A8 Frequency (MHz) 600, 800, 1000 Graphics acceleration 1 3D Display type 1 LCD Protocols EtherNet/IP, Ethernet, Profibus, Profinet, Sercos Hardware accelerators Industrial communications subsystem, Programable real-time unit, Security Accelerator Features General purpose, Networking Operating system Linux, RTOS Security Cryptographic acceleration, Device attestation & anti-counterfeit Rating Catalog Power supply solution TPS65216, TPS65218D0 Operating temperature range (°C) -40 to 105
NFBGA (ZCE) 298 169 mm² 13 x 13 NFBGA (ZCZ) 324 225 mm² 15 x 15
  • Up to 1-GHz Sitara™ ARM® Cortex®-A8 32‑Bit RISC Processor
    • NEON™ SIMD Coprocessor
    • 32KB of L1 Instruction and 32KB of Data Cache With Single-Error Detection (Parity)
    • 256KB of L2 Cache With Error Correcting Code (ECC)
    • 176KB of On-Chip Boot ROM
    • 64KB of Dedicated RAM
    • Emulation and Debug - JTAG
    • Interrupt Controller (up to 128 Interrupt Requests)
  • On-Chip Memory (Shared L3 RAM)
    • 64KB of General-Purpose On-Chip Memory Controller (OCMC) RAM
    • Accessible to All Masters
    • Supports Retention for Fast Wakeup
  • External Memory Interfaces (EMIF)
    • mDDR(LPDDR), DDR2, DDR3, DDR3L Controller:
      • mDDR: 200-MHz Clock (400-MHz Data Rate)
      • DDR2: 266-MHz Clock (532-MHz Data Rate)
      • DDR3: 400-MHz Clock (800-MHz Data Rate)
      • DDR3L: 400-MHz Clock (800-MHz Data Rate)
      • 16-Bit Data Bus
      • 1GB of Total Addressable Space
      • Supports One x16 or Two x8 Memory Device Configurations
    • General-Purpose Memory Controller (GPMC)
      • Flexible 8-Bit and 16-Bit Asynchronous Memory Interface With up to Seven Chip Selects (NAND, NOR, Muxed-NOR, SRAM)
      • Uses BCH Code to Support 4-, 8-, or 16-Bit ECC
      • Uses Hamming Code to Support 1-Bit ECC
    • Error Locator Module (ELM)
      • Used in Conjunction With the GPMC to Locate Addresses of Data Errors from Syndrome Polynomials Generated Using a BCH Algorithm
      • Supports 4-, 8-, and 16-Bit per 512-Byte Block Error Location Based on BCH Algorithms
  • Programmable Real-Time Unit Subsystem and Industrial Communication Subsystem (PRU-ICSS)
    • Supports Protocols such as EtherCAT®, PROFIBUS, PROFINET, EtherNet/IP™, and More
    • Two Programmable Real-Time Units (PRUs)
      • 32-Bit Load/Store RISC Processor Capable of Running at 200 MHz
      • 8KB of Instruction RAM With Single-Error Detection (Parity)
      • 8KB of Data RAM With Single-Error Detection (Parity)
      • Single-Cycle 32-Bit Multiplier With 64-Bit Accumulator
      • Enhanced GPIO Module Provides Shift-In/Out Support and Parallel Latch on External Signal
    • 12KB of Shared RAM With Single-Error Detection (Parity)
    • Three 120-Byte Register Banks Accessible by Each PRU
    • Interrupt Controller (INTC) for Handling System Input Events
    • Local Interconnect Bus for Connecting Internal and External Masters to the Resources Inside the PRU-ICSS
    • Peripherals Inside the PRU-ICSS:
      • One UART Port With Flow Control Pins, Supports up to 12 Mbps
      • One Enhanced Capture (eCAP) Module
      • Two MII Ethernet Ports that Support Industrial Ethernet, such as EtherCAT
      • One MDIO Port
  • Power, Reset, and Clock Management (PRCM) Module
    • Controls the Entry and Exit of Stand-By and Deep-Sleep Modes
    • Responsible for Sleep Sequencing, Power Domain Switch-Off Sequencing, Wake-Up Sequencing, and Power Domain Switch-On Sequencing
    • Clocks
      • Integrated 15- to 35-MHz High-Frequency Oscillator Used to Generate a Reference Clock for Various System and Peripheral Clocks
      • Supports Individual Clock Enable and Disable Control for Subsystems and Peripherals to Facilitate Reduced Power Consumption
      • Five ADPLLs to Generate System Clocks (MPU Subsystem, DDR Interface, USB and Peripherals [MMC and SD, UART, SPI, I2C], L3, L4, Ethernet, GFX [SGX530], LCD Pixel Clock)
    • Power
      • Two Nonswitchable Power Domains (Real-Time Clock [RTC], Wake-Up Logic [WAKEUP])
      • Three Switchable Power Domains (MPU Subsystem [MPU], SGX530 [GFX], Peripherals and Infrastructure [PER])
      • Implements SmartReflex™ Class 2B for Core Voltage Scaling Based On Die Temperature, Process Variation, and Performance (Adaptive Voltage Scaling [AVS])
      • Dynamic Voltage Frequency Scaling (DVFS)
  • Real-Time Clock (RTC)
    • Real-Time Date (Day-Month-Year-Day of Week) and Time (Hours-Minutes-Seconds) Information
    • Internal 32.768-kHz Oscillator, RTC Logic and 1.1-V Internal LDO
    • Independent Power-on-Reset (RTC_PWRONRSTn) Input
    • Dedicated Input Pin (EXT_WAKEUP) for External Wake Events
    • Programmable Alarm Can be Used to Generate Internal Interrupts to the PRCM (for Wakeup) or Cortex-A8 (for Event Notification)
    • Programmable Alarm Can be Used With External Output (PMIC_POWER_EN) to Enable the Power Management IC to Restore Non-RTC Power Domains
  • Peripherals
    • Up to Two USB 2.0 High-Speed DRD (Dual-Role Device) Ports With Integrated PHY
    • Up to Two Industrial Gigabit Ethernet MACs (10, 100, 1000 Mbps)
      • Integrated Switch
      • Each MAC Supports MII, RMII, RGMII, and MDIO Interfaces
      • Ethernet MACs and Switch Can Operate Independent of Other Functions
      • IEEE 1588v1 Precision Time Protocol (PTP)
    • Up to Two Controller-Area Network (CAN) Ports
      • Supports CAN Version 2 Parts A and B
    • Up to Two Multichannel Audio Serial Ports (McASPs)
      • Transmit and Receive Clocks up to 50 MHz
      • Up to Four Serial Data Pins per McASP Port With Independent TX and RX Clocks
      • Supports Time Division Multiplexing (TDM), Inter-IC Sound (I2S), and Similar Formats
      • Supports Digital Audio Interface Transmission (SPDIF, IEC60958-1, and AES-3 Formats)
      • FIFO Buffers for Transmit and Receive (256 Bytes)
    • Up to Six UARTs
      • All UARTs Support IrDA and CIR Modes
      • All UARTs Support RTS and CTS Flow Control
      • UART1 Supports Full Modem Control
    • Up to Two Master and Slave McSPI Serial Interfaces
      • Up to Two Chip Selects
      • Up to 48 MHz
    • Up to Three MMC, SD, SDIO Ports
      • 1-, 4- and 8-Bit MMC, SD, SDIO Modes
      • MMCSD0 has Dedicated Power Rail for 1.8‑V or 3.3-V Operation
      • Up to 48-MHz Data Transfer Rate
      • Supports Card Detect and Write Protect
      • Complies With MMC4.3, SD, SDIO 2.0 Specifications
    • Up to Three I2C Master and Slave Interfaces
      • Standard Mode (up to 100 kHz)
      • Fast Mode (up to 400 kHz)
    • Up to Four Banks of General-Purpose I/O (GPIO) Pins
      • 32 GPIO Pins per Bank (Multiplexed With Other Functional Pins)
      • GPIO Pins Can be Used as Interrupt Inputs (up to Two Interrupt Inputs per Bank)
    • Up to Three External DMA Event Inputs that can Also be Used as Interrupt Inputs
    • Eight 32-Bit General-Purpose Timers
      • DMTIMER1 is a 1-ms Timer Used for Operating System (OS) Ticks
      • DMTIMER4–DMTIMER7 are Pinned Out
    • One Watchdog Timer
    • SGX530 3D Graphics Engine
      • Tile-Based Architecture Delivering up to 20 Million Polygons per Second
      • Universal Scalable Shader Engine (USSE) is a Multithreaded Engine Incorporating Pixel and Vertex Shader Functionality
      • Advanced Shader Feature Set in Excess of Microsoft VS3.0, PS3.0, and OGL2.0
      • Industry Standard API Support of Direct3D Mobile, OGL-ES 1.1 and 2.0, and OpenMax
      • Fine-Grained Task Switching, Load Balancing, and Power Management
      • Advanced Geometry DMA-Driven Operation for Minimum CPU Interaction
      • Programmable High-Quality Image Anti-Aliasing
      • Fully Virtualized Memory Addressing for OS Operation in a Unified Memory Architecture
    • LCD Controller
      • Up to 24-Bit Data Output; 8 Bits per Pixel (RGB)
      • Resolution up to 2048 × 2048 (With Maximum 126-MHz Pixel Clock)
      • Integrated LCD Interface Display Driver (LIDD) Controller
      • Integrated Raster Controller
      • Integrated DMA Engine to Pull Data from the External Frame Buffer Without Burdening the Processor via Interrupts or a Firmware Timer
      • 512-Word Deep Internal FIFO
      • Supported Display Types:
        • Character Displays - Uses LIDD Controller to Program these Displays
        • Passive Matrix LCD Displays - Uses LCD Raster Display Controller to Provide Timing and Data for Constant Graphics Refresh to a Passive Display
        • Active Matrix LCD Displays - Uses External Frame Buffer Space and the Internal DMA Engine to Drive Streaming Data to the Panel
    • 12-Bit Successive Approximation Register (SAR) ADC
      • 200K Samples per Second
      • Input can be Selected from any of the Eight Analog Inputs Multiplexed Through an 8:1 Analog Switch
      • Can be Configured to Operate as a 4-Wire, 5-Wire, or 8-Wire Resistive Touch Screen Controller (TSC) Interface
    • Up to Three 32-Bit eCAP Modules
      • Configurable as Three Capture Inputs or Three Auxiliary PWM Outputs
    • Up to Three Enhanced High-Resolution PWM Modules (eHRPWMs)
      • Dedicated 16-Bit Time-Base Counter With Time and Frequency Controls
      • Configurable as Six Single-Ended, Six Dual-Edge Symmetric, or Three Dual-Edge Asymmetric Outputs
    • Up to Three 32-Bit Enhanced Quadrature Encoder Pulse (eQEP) Modules
  • Device Identification
    • Contains Electrical Fuse Farm (FuseFarm) of Which Some Bits are Factory Programmable
      • Production ID
      • Device Part Number (Unique JTAG ID)
      • Device Revision (Readable by Host ARM)
  • Debug Interface Support
    • JTAG and cJTAG for ARM (Cortex-A8 and PRCM), PRU-ICSS Debug
    • Supports Device Boundary Scan
    • Supports IEEE 1500
  • DMA
    • On-Chip Enhanced DMA Controller (EDMA) has Three Third-Party Transfer Controllers (TPTCs) and One Third-Party Channel Controller (TPCC), Which Supports up to 64 Programmable Logical Channels and Eight QDMA Channels. EDMA is Used for:
      • Transfers to and from On-Chip Memories
      • Transfers to and from External Storage (EMIF, GPMC, Slave Peripherals)
  • Inter-Processor Communication (IPC)
    • Integrates Hardware-Based Mailbox for IPC and Spinlock for Process Synchronization Between Cortex-A8, PRCM, and PRU-ICSS
      • Mailbox Registers that Generate Interrupts
        • Four Initiators (Cortex-A8, PRCM, PRU0, PRU1)
      • Spinlock has 128 Software-Assigned Lock Registers
  • Security
    • Crypto Hardware Accelerators (AES, SHA, RNG)
    • Secure Boot (optional; requires custom part engagement with TI)
  • Boot Modes
    • Boot Mode is Selected Through Boot Configuration Pins Latched on the Rising Edge of the PWRONRSTn Reset Input Pin
  • Packages:
    • 298-Pin S-PBGA-N298 Via Channel Package
      (ZCE Suffix), 0.65-mm Ball Pitch
    • 324-Pin S-PBGA-N324 Package
      (ZCZ Suffix), 0.80-mm Ball Pitch
  • Up to 1-GHz Sitara™ ARM® Cortex®-A8 32‑Bit RISC Processor
    • NEON™ SIMD Coprocessor
    • 32KB of L1 Instruction and 32KB of Data Cache With Single-Error Detection (Parity)
    • 256KB of L2 Cache With Error Correcting Code (ECC)
    • 176KB of On-Chip Boot ROM
    • 64KB of Dedicated RAM
    • Emulation and Debug - JTAG
    • Interrupt Controller (up to 128 Interrupt Requests)
  • On-Chip Memory (Shared L3 RAM)
    • 64KB of General-Purpose On-Chip Memory Controller (OCMC) RAM
    • Accessible to All Masters
    • Supports Retention for Fast Wakeup
  • External Memory Interfaces (EMIF)
    • mDDR(LPDDR), DDR2, DDR3, DDR3L Controller:
      • mDDR: 200-MHz Clock (400-MHz Data Rate)
      • DDR2: 266-MHz Clock (532-MHz Data Rate)
      • DDR3: 400-MHz Clock (800-MHz Data Rate)
      • DDR3L: 400-MHz Clock (800-MHz Data Rate)
      • 16-Bit Data Bus
      • 1GB of Total Addressable Space
      • Supports One x16 or Two x8 Memory Device Configurations
    • General-Purpose Memory Controller (GPMC)
      • Flexible 8-Bit and 16-Bit Asynchronous Memory Interface With up to Seven Chip Selects (NAND, NOR, Muxed-NOR, SRAM)
      • Uses BCH Code to Support 4-, 8-, or 16-Bit ECC
      • Uses Hamming Code to Support 1-Bit ECC
    • Error Locator Module (ELM)
      • Used in Conjunction With the GPMC to Locate Addresses of Data Errors from Syndrome Polynomials Generated Using a BCH Algorithm
      • Supports 4-, 8-, and 16-Bit per 512-Byte Block Error Location Based on BCH Algorithms
  • Programmable Real-Time Unit Subsystem and Industrial Communication Subsystem (PRU-ICSS)
    • Supports Protocols such as EtherCAT®, PROFIBUS, PROFINET, EtherNet/IP™, and More
    • Two Programmable Real-Time Units (PRUs)
      • 32-Bit Load/Store RISC Processor Capable of Running at 200 MHz
      • 8KB of Instruction RAM With Single-Error Detection (Parity)
      • 8KB of Data RAM With Single-Error Detection (Parity)
      • Single-Cycle 32-Bit Multiplier With 64-Bit Accumulator
      • Enhanced GPIO Module Provides Shift-In/Out Support and Parallel Latch on External Signal
    • 12KB of Shared RAM With Single-Error Detection (Parity)
    • Three 120-Byte Register Banks Accessible by Each PRU
    • Interrupt Controller (INTC) for Handling System Input Events
    • Local Interconnect Bus for Connecting Internal and External Masters to the Resources Inside the PRU-ICSS
    • Peripherals Inside the PRU-ICSS:
      • One UART Port With Flow Control Pins, Supports up to 12 Mbps
      • One Enhanced Capture (eCAP) Module
      • Two MII Ethernet Ports that Support Industrial Ethernet, such as EtherCAT
      • One MDIO Port
  • Power, Reset, and Clock Management (PRCM) Module
    • Controls the Entry and Exit of Stand-By and Deep-Sleep Modes
    • Responsible for Sleep Sequencing, Power Domain Switch-Off Sequencing, Wake-Up Sequencing, and Power Domain Switch-On Sequencing
    • Clocks
      • Integrated 15- to 35-MHz High-Frequency Oscillator Used to Generate a Reference Clock for Various System and Peripheral Clocks
      • Supports Individual Clock Enable and Disable Control for Subsystems and Peripherals to Facilitate Reduced Power Consumption
      • Five ADPLLs to Generate System Clocks (MPU Subsystem, DDR Interface, USB and Peripherals [MMC and SD, UART, SPI, I2C], L3, L4, Ethernet, GFX [SGX530], LCD Pixel Clock)
    • Power
      • Two Nonswitchable Power Domains (Real-Time Clock [RTC], Wake-Up Logic [WAKEUP])
      • Three Switchable Power Domains (MPU Subsystem [MPU], SGX530 [GFX], Peripherals and Infrastructure [PER])
      • Implements SmartReflex™ Class 2B for Core Voltage Scaling Based On Die Temperature, Process Variation, and Performance (Adaptive Voltage Scaling [AVS])
      • Dynamic Voltage Frequency Scaling (DVFS)
  • Real-Time Clock (RTC)
    • Real-Time Date (Day-Month-Year-Day of Week) and Time (Hours-Minutes-Seconds) Information
    • Internal 32.768-kHz Oscillator, RTC Logic and 1.1-V Internal LDO
    • Independent Power-on-Reset (RTC_PWRONRSTn) Input
    • Dedicated Input Pin (EXT_WAKEUP) for External Wake Events
    • Programmable Alarm Can be Used to Generate Internal Interrupts to the PRCM (for Wakeup) or Cortex-A8 (for Event Notification)
    • Programmable Alarm Can be Used With External Output (PMIC_POWER_EN) to Enable the Power Management IC to Restore Non-RTC Power Domains
  • Peripherals
    • Up to Two USB 2.0 High-Speed DRD (Dual-Role Device) Ports With Integrated PHY
    • Up to Two Industrial Gigabit Ethernet MACs (10, 100, 1000 Mbps)
      • Integrated Switch
      • Each MAC Supports MII, RMII, RGMII, and MDIO Interfaces
      • Ethernet MACs and Switch Can Operate Independent of Other Functions
      • IEEE 1588v1 Precision Time Protocol (PTP)
    • Up to Two Controller-Area Network (CAN) Ports
      • Supports CAN Version 2 Parts A and B
    • Up to Two Multichannel Audio Serial Ports (McASPs)
      • Transmit and Receive Clocks up to 50 MHz
      • Up to Four Serial Data Pins per McASP Port With Independent TX and RX Clocks
      • Supports Time Division Multiplexing (TDM), Inter-IC Sound (I2S), and Similar Formats
      • Supports Digital Audio Interface Transmission (SPDIF, IEC60958-1, and AES-3 Formats)
      • FIFO Buffers for Transmit and Receive (256 Bytes)
    • Up to Six UARTs
      • All UARTs Support IrDA and CIR Modes
      • All UARTs Support RTS and CTS Flow Control
      • UART1 Supports Full Modem Control
    • Up to Two Master and Slave McSPI Serial Interfaces
      • Up to Two Chip Selects
      • Up to 48 MHz
    • Up to Three MMC, SD, SDIO Ports
      • 1-, 4- and 8-Bit MMC, SD, SDIO Modes
      • MMCSD0 has Dedicated Power Rail for 1.8‑V or 3.3-V Operation
      • Up to 48-MHz Data Transfer Rate
      • Supports Card Detect and Write Protect
      • Complies With MMC4.3, SD, SDIO 2.0 Specifications
    • Up to Three I2C Master and Slave Interfaces
      • Standard Mode (up to 100 kHz)
      • Fast Mode (up to 400 kHz)
    • Up to Four Banks of General-Purpose I/O (GPIO) Pins
      • 32 GPIO Pins per Bank (Multiplexed With Other Functional Pins)
      • GPIO Pins Can be Used as Interrupt Inputs (up to Two Interrupt Inputs per Bank)
    • Up to Three External DMA Event Inputs that can Also be Used as Interrupt Inputs
    • Eight 32-Bit General-Purpose Timers
      • DMTIMER1 is a 1-ms Timer Used for Operating System (OS) Ticks
      • DMTIMER4–DMTIMER7 are Pinned Out
    • One Watchdog Timer
    • SGX530 3D Graphics Engine
      • Tile-Based Architecture Delivering up to 20 Million Polygons per Second
      • Universal Scalable Shader Engine (USSE) is a Multithreaded Engine Incorporating Pixel and Vertex Shader Functionality
      • Advanced Shader Feature Set in Excess of Microsoft VS3.0, PS3.0, and OGL2.0
      • Industry Standard API Support of Direct3D Mobile, OGL-ES 1.1 and 2.0, and OpenMax
      • Fine-Grained Task Switching, Load Balancing, and Power Management
      • Advanced Geometry DMA-Driven Operation for Minimum CPU Interaction
      • Programmable High-Quality Image Anti-Aliasing
      • Fully Virtualized Memory Addressing for OS Operation in a Unified Memory Architecture
    • LCD Controller
      • Up to 24-Bit Data Output; 8 Bits per Pixel (RGB)
      • Resolution up to 2048 × 2048 (With Maximum 126-MHz Pixel Clock)
      • Integrated LCD Interface Display Driver (LIDD) Controller
      • Integrated Raster Controller
      • Integrated DMA Engine to Pull Data from the External Frame Buffer Without Burdening the Processor via Interrupts or a Firmware Timer
      • 512-Word Deep Internal FIFO
      • Supported Display Types:
        • Character Displays - Uses LIDD Controller to Program these Displays
        • Passive Matrix LCD Displays - Uses LCD Raster Display Controller to Provide Timing and Data for Constant Graphics Refresh to a Passive Display
        • Active Matrix LCD Displays - Uses External Frame Buffer Space and the Internal DMA Engine to Drive Streaming Data to the Panel
    • 12-Bit Successive Approximation Register (SAR) ADC
      • 200K Samples per Second
      • Input can be Selected from any of the Eight Analog Inputs Multiplexed Through an 8:1 Analog Switch
      • Can be Configured to Operate as a 4-Wire, 5-Wire, or 8-Wire Resistive Touch Screen Controller (TSC) Interface
    • Up to Three 32-Bit eCAP Modules
      • Configurable as Three Capture Inputs or Three Auxiliary PWM Outputs
    • Up to Three Enhanced High-Resolution PWM Modules (eHRPWMs)
      • Dedicated 16-Bit Time-Base Counter With Time and Frequency Controls
      • Configurable as Six Single-Ended, Six Dual-Edge Symmetric, or Three Dual-Edge Asymmetric Outputs
    • Up to Three 32-Bit Enhanced Quadrature Encoder Pulse (eQEP) Modules
  • Device Identification
    • Contains Electrical Fuse Farm (FuseFarm) of Which Some Bits are Factory Programmable
      • Production ID
      • Device Part Number (Unique JTAG ID)
      • Device Revision (Readable by Host ARM)
  • Debug Interface Support
    • JTAG and cJTAG for ARM (Cortex-A8 and PRCM), PRU-ICSS Debug
    • Supports Device Boundary Scan
    • Supports IEEE 1500
  • DMA
    • On-Chip Enhanced DMA Controller (EDMA) has Three Third-Party Transfer Controllers (TPTCs) and One Third-Party Channel Controller (TPCC), Which Supports up to 64 Programmable Logical Channels and Eight QDMA Channels. EDMA is Used for:
      • Transfers to and from On-Chip Memories
      • Transfers to and from External Storage (EMIF, GPMC, Slave Peripherals)
  • Inter-Processor Communication (IPC)
    • Integrates Hardware-Based Mailbox for IPC and Spinlock for Process Synchronization Between Cortex-A8, PRCM, and PRU-ICSS
      • Mailbox Registers that Generate Interrupts
        • Four Initiators (Cortex-A8, PRCM, PRU0, PRU1)
      • Spinlock has 128 Software-Assigned Lock Registers
  • Security
    • Crypto Hardware Accelerators (AES, SHA, RNG)
    • Secure Boot (optional; requires custom part engagement with TI)
  • Boot Modes
    • Boot Mode is Selected Through Boot Configuration Pins Latched on the Rising Edge of the PWRONRSTn Reset Input Pin
  • Packages:
    • 298-Pin S-PBGA-N298 Via Channel Package
      (ZCE Suffix), 0.65-mm Ball Pitch
    • 324-Pin S-PBGA-N324 Package
      (ZCZ Suffix), 0.80-mm Ball Pitch

The AM335x microprocessors, based on the ARM Cortex-A8 processor, are enhanced with image, graphics processing, peripherals and industrial interface options such as EtherCAT and PROFIBUS. The devices support high-level operating systems (HLOS). Processor SDK Linux® and TI-RTOS are available free of charge from TI.

The AM335x microprocessor contains the subsystems shown in the Functional Block Diagram and a brief description of each follows:

The contains the subsystems shown in the Functional Block Diagram and a brief description of each follows:

The microprocessor unit (MPU) subsystem is based on the ARM Cortex-A8 processor and the PowerVR SGX™ Graphics Accelerator subsystem provides 3D graphics acceleration to support display and gaming effects.

The PRU-ICSS is separate from the ARM core, allowing independent operation and clocking for greater efficiency and flexibility. The PRU-ICSS enables additional peripheral interfaces and real-time protocols such as EtherCAT, PROFINET, EtherNet/IP, PROFIBUS, Ethernet Powerlink, Sercos, and others. Additionally, the programmable nature of the PRU-ICSS, along with its access to pins, events and all system-on-chip (SoC) resources, provides flexibility in implementing fast, real-time responses, specialized data handling operations, custom peripheral interfaces, and in offloading tasks from the other processor cores of SoC.

The AM335x microprocessors, based on the ARM Cortex-A8 processor, are enhanced with image, graphics processing, peripherals and industrial interface options such as EtherCAT and PROFIBUS. The devices support high-level operating systems (HLOS). Processor SDK Linux® and TI-RTOS are available free of charge from TI.

The AM335x microprocessor contains the subsystems shown in the Functional Block Diagram and a brief description of each follows:

The contains the subsystems shown in the Functional Block Diagram and a brief description of each follows:

The microprocessor unit (MPU) subsystem is based on the ARM Cortex-A8 processor and the PowerVR SGX™ Graphics Accelerator subsystem provides 3D graphics acceleration to support display and gaming effects.

The PRU-ICSS is separate from the ARM core, allowing independent operation and clocking for greater efficiency and flexibility. The PRU-ICSS enables additional peripheral interfaces and real-time protocols such as EtherCAT, PROFINET, EtherNet/IP, PROFIBUS, Ethernet Powerlink, Sercos, and others. Additionally, the programmable nature of the PRU-ICSS, along with its access to pins, events and all system-on-chip (SoC) resources, provides flexibility in implementing fast, real-time responses, specialized data handling operations, custom peripheral interfaces, and in offloading tasks from the other processor cores of SoC.
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Documentación técnica

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Documentación principal Tipo Título Opciones de formato Fecha
* Data sheet AM335x Sitara™ Processors datasheet (Rev. L) PDF | HTML 15 nov 2019
* Errata AM335x Sitara Processors Silicon Errata (Revs 2.1, 2.0, 1.0) (Rev. I) 03 ene 2017
* User guide AM335x and AMIC110 Sitara™ Processors Technical Reference Manual (Rev. Q) 14 feb 2023
Application note HSR/PRP Solutions on Sitara Processors for Grid Substation Communication (Rev. A) PDF | HTML 30 ene 2026
Application note Enabling Matter on Sitara MPU (Rev. A) PDF | HTML 24 nov 2025
Application note Custom Board Design and Simulation Guidelines for Processor High Speed Parallel Interfaces (Rev. A) PDF | HTML 05 sep 2025
Application note Industrial Communication Protocols Supported on TI Processors and MCUs (Rev. F) PDF | HTML 03 sep 2025
Application note AM335x Power Estimation Tool (Rev. A) PDF | HTML 11 jun 2025
White paper Securing Arm-Based Application Processors (Rev. F) PDF | HTML 26 feb 2025
Application note Basic Ethernet Interface Debug With Linux PDF | HTML 11 oct 2024
White paper Time Sensitive Networking for Industrial Automation (Rev. C) 31 jul 2023
Application note Intra Drive Communication Using 8b-10b Line Code With Programmable Real Time Uni PDF | HTML 24 may 2023
Application note High-Speed Interface Layout Guidelines (Rev. J) PDF | HTML 24 feb 2023
Application note PRU-ICSS Feature Comparison (Rev. G) PDF | HTML 11 oct 2022
Design guide Discrete Power Solution for AM335x in 12mmx12mm Form-Factor Reference Design (Rev. A) PDF | HTML 09 nov 2021
Application note nfBGA Packaging (Rev. C) PDF | HTML 17 may 2021
Application note Ethernet PHY Configuration Using MDIO for Industrial Applications (Rev. A) 07 may 2021
More literature From Start to Finish: A Product Development Roadmap for Sitara™ Processors 16 dic 2020
White paper Evolving Semiconductor Technologies for Modern Telehealth Applications 26 oct 2020
White paper EtherNet/IP on TI's Sitara AM335x Processors (Rev. D) 28 jul 2020
User guide Powering the AM335x, AM437x, and AM438x with TPS65218D0 (Rev. B) 27 feb 2020
E-book E-book: An engineer’s guide to industrial robot designs 12 feb 2020
Application note AM335x Schematic Checklist (Rev. A) PDF | HTML 19 dic 2019
Application note AM335x EMIF Tools 20 sep 2019
Application note AM335x PMIC Selection Guide (Rev. A) 19 sep 2019
Application note Programmable Logic Controllers — Security Threats and Solutions PDF | HTML 13 sep 2019
Product overview Sitara™ processors + WiLink™ 8 Wi-Fi® + Bluetooth® combo connectivity (Rev. A) 30 jul 2019
White paper Power optimization techniques for energy-efficient systems (Rev. A) 28 jun 2019
Application note Calculating Useful Lifetimes of Embedded Processors (Rev. B) PDF | HTML 07 may 2019
Application note AM335x Hardware Design Guide PDF | HTML 03 may 2019
Application note How to Port WOLFSSL Onto TI Sitara AM335 Starter Kit PDF | HTML 24 abr 2019
User guide Powering AMIC110, AMIC120, AM335x, and AM437x with TPS65216 11 abr 2019
Application note Common EOS pitfalls in board design 13 feb 2019
Technical article How a small SOT563 DC/DC converter supplies multirail power in industrial applicat PDF | HTML 21 ene 2019
Application note PRU-ICSS Getting Started Guide on TI-RTOS (Rev. A) 18 ene 2019
Application note McASP Design Guide - Tips, Tricks, and Practical Examples 10 ene 2019
Application note PRU Read Latencies (Rev. A) 21 dic 2018
Application note PRU-ICSS Getting Starting Guide on Linux (Rev. A) 10 dic 2018
White paper Ensuring real-time predictability (Rev. B) 04 dic 2018
Application note PRU-ICSS EtherCAT Slave Troubleshooting Guide 07 nov 2018
Application note PRU-ICSS / PRU_ICSSG Migration Guide 05 nov 2018
White paper PROFINET on TI’s Sitara™ processors (Rev. D) 13 oct 2018
White paper Secure Boot on embedded Sitara™ processors (Rev. A) 13 oct 2018
User guide How-To and Troubleshooting Guide for PRU-ICSS PROFIBUS 24 sep 2018
Technical article Using the DLP® LightCrafter™ Display 2000 EVM with embedded Linux host processors PDF | HTML 01 jun 2018
Technical article FreeWave brings IoT to the oil field using TI’s SimpleLink CC13xx and Sitara AM335 PDF | HTML 23 may 2018
Application note Processor SDK RTOS Customization: Modifying Board library to change UART instanc (Rev. A) 28 mar 2018
User guide Powering the AM335x With the TPS650250 (Rev. B) 14 mar 2018
White paper Data concentrators: The core of energy and data management (Rev. A) 21 feb 2018
User guide PRU Assembly Instruction User Guide 16 feb 2018
White paper POWERLINK on TI Sitara Processors (Rev. A) 10 ene 2018
Product overview TI Sitara™ AM335x ARM® Cortex™-A8 Microprocessors (Rev. E) 19 dic 2017
User guide TPS65910Ax User's Guide for AM335x Processors (Rev. F) 08 dic 2017
User guide Sub-1 GHz Sensor-to-Cloud Linux® E14 Kit 16 oct 2017
Application note Thermal Design Guide for DSP and Arm Application Processors (Rev. B) 14 ago 2017
Application note Processor-SDK RTOS Power Management and Measurement 02 ago 2017
Application note Sitara Linux ALSA DSP Microphone Array Voice Recognition 30 jun 2017
White paper Connected sensors in industrial automation (Rev. B) 22 jun 2017
Application note AM335x Reliability Considerations in PLC Applications (Rev. A) 27 abr 2017
Technical article Long range sensor-to-cloud: Connecting to Amazon Web Services with Sub-1 GHz-based PDF | HTML 14 mar 2017
Application note AM335x Low Power Design Guide (Rev. A) 28 feb 2017
Technical article IoT is making buildings greener and more intelligent. Value versus affordability PDF | HTML 04 ene 2017
Technical article Keep the data processing PDF | HTML 31 ago 2016
White paper Enable security and amp up chip performance w/ hardware-accelerated cryptograpy (Rev. A) 11 ago 2016
Technical article Tackle the challenges of IoT application development with the Seeed Studio BeagleB PDF | HTML 03 ago 2016
Technical article A new dimension of integration PDF | HTML 17 may 2016
White paper Building automation for enhanced energy and operational efficiency (Rev. A) 26 oct 2015
Application note Plastic Ball Grid Array [PBGA] Application Note (Rev. B) 13 ago 2015
White paper Profibus on AM335x and AM1810 Sitara ARM Microprocessor White Paper (Rev. B) 03 mar 2015
User guide G3 Power Line Communication Data Concentrator on BeagleBone Black Design Guide 13 nov 2014
User guide Powering the AM335x with the TPS65217x . (Rev. I) 06 sep 2014
White paper Mainline Linux™ ensures stability and innovation 27 mar 2014
White paper Linaro Speeds Development in TI Linux SDKs 27 ago 2013
White paper The Yocto Project:Changing the way embedded Linux software solutions are develop 14 mar 2013
White paper Smart thermostats are a cool addition to the connected home 27 sep 2012

Diseño y desarrollo

Soluciones de alimentación

Busque las soluciones de alimentación disponibles para el AM3358. TI ofrece soluciones de alimentación para sistemas en chip (SoC), procesadores, microcontroladores, sensores y matrices de compuertas programables de campo (FPGA), sean o no de TI.

Ver soluciones
Placa de evaluación

TMDSICE3359 — Motor de comunicaciones industriales AM3359

The AM3359 Industrial Communications Engine (ICE) is a development platform targeted for systems that specifically focus on the industrial communications capabilities of the Sitara AM335x Arm® Cortex™-A8 processors.

The AM335x Arm Cortex-A8 processors integrate the Programmable Real-time Unit (PRU) (...)

Guía del usuario: PDF
No disponible en TI.com
Placa de evaluación

TMDXEVM3358 — Módulo de evaluación AM335x

The AM335x Evaluation Module (EVM) enables developers to immediately start evaluating the AM335x processor family (AM3351, AM3352, AM3354, AM3356, AM3358) and begin building applications for factory automation, building automation, grid infrastructure, and more.

Guía del usuario: PDF
No disponible en TI.com
Placa de evaluación

TPS65217CEVM — Módulo de evaluación TPS65217C

The TPS65217CEVM is a fully assembled platform for evaluating the performance of the TPS65217C power management device.

Guía del usuario: PDF
No disponible en TI.com
Placa de evaluación

TPS65218EVM-100 — Módulo de evaluación TPS65218

The TPS65218EVM is a fully assembled platform for evaluating the performance of the TPS65218 power management device.

Guía del usuario: PDF | HTML
No disponible en TI.com
Placa de evaluación

ADVAN-3P-SITARA-SOMS — SOM y SBC de Advantech Sitara

Advantech offers Sitara™ based embedded core computing solutions including computer-on-modules, single-board-computers and box computers. Their compact, low-power-consumption, and cost-effective Arm®-based platform solutions are designed to deliver easier system integration, better (...)
Desde: Advantech
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Placa de evaluación

BEAGL-BONE-BLACK — BeagleBone® Black es una computadora de una sola placa de BeagleBoard.org Foundation basada en AM335

BeagleBone Black es una plataforma de desarrollo de bajo costo y apoyada por la comunidad para desarrolladores y aficionados. Inicie Linux en menos de 10 segundos y comience a desarrollar en menos de 5 minutos con un solo cable USB.
Desde: BeagleBoard.org Foundation
No disponible en TI.com
Placa de evaluación

BEAGL-BONE-GRN-ECO — Seeed Studio BeagleBone® Green eco evaluation module

Seeed Studio BeagleBone® Green Eco is a low-cost, industrial-grade open-source hardware development platform that is based on the AM335x Arm® Cortex®-A8 processor. This four-layer design incorporates high-quality components that support wider temperature ranges, enhanced power stability, increased (...)
Desde: Seeed Technology Co., Ltd.
Guía del usuario: PDF | HTML
No disponible en TI.com
Placa de evaluación

BYTES-3P-SITARASOMS — Bytes en el trabajo SOM de Sitara

bytes at work develops industrial computing products and services. They offer SOMs based on Sitara Arm® processors.

Learn more about bytes at work at http://www.bytesatwork.io/en. 


Desde: bytes at work AG
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Placa de evaluación

COMPU-3P-SITARASOMS — SOMs Compulab Sitara

CompuLab is a leading manufacturer of computer-on-module boards and miniature PC systems. CompuLab's products excel with an advanced set of features, outstanding level of integration, high reliability and affordable prices. Annual manufacturing rate of over 100,000 boards and systems positions (...)
Desde: CompuLab
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Placa de evaluación

CRLNK-3P-SOMS — Sistema Critical Link MitySOM en módulos para procesadores basados en TI Arm

Critical Link is a US-based embedded systems company offering System on Modules (SoMs) and scientific imaging platforms for electronic applications around the world. The MitySOM® and MityDSP® families incorporate DSP, FPGA, and ARM technologies, and are designed for long product lifespan and (...)

Desde: Critical Link LLC
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Placa de evaluación

FORLX-3P-SITARA-SOMS — SOM Forlinx Sitara

As a member unit of CSIA (China Software Industry Association) Embedded System Branch, Forlinx Embedded Tech Co., Ltd. has the capability to design, prototype and manufacture printed circuit boards, sub-assemblies and complete electronic products. Forlinx is committed to the development of Sitara (...)
Desde: Forlinx Embedded Tech. Co., Ltd
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Placa de evaluación

MYIR-3P-SITARASOMS — SOM MYIR Sitara

MYIR offers a series of development kits and system-on-modules based on TI's AM335x Arm® Cortex®-A8 processors to meet customers' different requirements. MYIR also offers a compact single board computer Rico board based on TI's newest AM437x Arm Cortex-A9 solution. MYIR also offers custom (...)
Desde: MYIR Tech Limited
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Placa de evaluación

OCTVO-3P-AM335X — Sistema en encapsulado basado en AM335x Octavo Systems

Octavo Systems es líder en el suministro de soluciones basadas en sistemas en encapsulados (SiP) a innovadores de todo el mundo. La familia OSD335x de dispositivos SiP es la forma más rápida y rentable de desarrollar e implementar sistemas integrados de alto rendimiento basados en el procesador (...)

Desde: Octavo Systems
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Placa de evaluación

PHYTC-3P-PHYBOARD-AM335X — Kit de desarrollo PHYTEC® phyBOARD®-AM335x para procesadores AM335x Sitara™ basados en Arm

La phyBOARD®-AM335x cuenta con un sistema en módulo (SOM) phyCORE-AM335x, basado en el Sitara™ AM335x de TI, que se suelda directamente en una placa portadora de circuito impreso. Esta “conexión directa por soldadura” (DSC) del sistema en módulo a la placa portadora reduce los costos del sistema al (...)

Desde: PHYTEC
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Placa de evaluación

PHYTC-3P-PHYCORE-AM335X — Sistema PHYTEC phyCORE-AM335x en módulo

El phyCORE®-AM335x SOM es compatible con la familia de procesadores Sitara™ AM335x de Texas Instruments, que ofrecen alto rendimiento de procesamiento, baja potencia y un conjunto de periféricos altamente integrado enriquecido con el procesamiento de gráficos de vanguardia, así como soporte de (...)

Desde: PHYTEC
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Placa de evaluación

TQ-3P-SITARASOMS — Sistema de TQ Group en módulos para procesadores y microcontroladores basados en TI Arm

TQ offers the complete range of services from development, through production and service right up to product life cycle management. The services cover assemblies, equipment and systems including hardware, software and mechanics. Customers can obtain all services from TQ on a modular basis as (...)
Desde: TQ-Group
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Placa de evaluación

VANWS-3P-VGATEWAY — Diseño de referencia vGATEWAY de Vanteon Wireless Solutions basado en AM335x

Vanteon Gateway™ is a modular bridging platform designed to translate between common wireless interfaces and protocols for Internet of Things (IoT) applications. The Gateway™ platform utilizes the AM335x Sitara ARM-Cortex A8 processor and includes many standard wired and wireless communication (...)

Desde: Vanteon Wireless Solutions
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Placa de evaluación

VAR-3P-SITARASOMS — SOM de Variscite Sitara

Variscite designs and produces a variety of system on modules and single board computers based TI's Sitara™, OMAP™ and DaVinci™ processors, covering a wide range of products, segments and markets. Variscite provides its customers with a complete development kit supporting Windows (...)
Desde: Variscite
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Tarjeta secundaria

PRUCAPE — Cabo TI PRU

The TI PRU Cape is a BeagleBone Black add-on board that allows users get to know TI’s powerful Programmable Real-Time Unit (PRU) core and basic functionality. The PRU is a low-latency microcontroller subsystem integrated in the Sitara AM335x and AM437x family of devices.  The PRU core is (...)

No disponible en TI.com
Sonda de depuración

TMDSEMU200-U — Sonda de depuración XDS200 USB

El XDS200 es una sonda de depuración (emulador) que se utiliza para depurar dispositivos integrados de TI. Para la mayoría de los dispositivos, se recomienda utilizar el XDS110 (www.ti.com/tool/TMDSEMU110-U), que es más nuevo y de menor costo. El XDS200 es compatible con una amplia variedad de (...)

No disponible en TI.com
Sonda de depuración

TMDSEMU560V2STM-U — Sonda de depuración USB de seguimiento del sistema XDS560v2

The XDS560v2 is the highest performance of the XDS560™ family of debug probes and supports both the traditional JTAG standard (IEEE1149.1) and cJTAG (IEEE1149.7).  Note that it does not support serial wire debug (SWD).

All XDS debug probes support Core and System Trace in all ARM and DSP processors (...)

No disponible en TI.com
Sonda de depuración

TMDSEMU560V2STM-UE — Sonda de depuración USB y ethernet de seguimiento del sistema XDS560v2

The XDS560v2 is the highest performance of the XDS560™ family of debug probes and supports both the traditional JTAG standard (IEEE1149.1) and cJTAG (IEEE1149.7). Note that it does not support serial wire debug (SWD).

All XDS debug probes support Core and System Trace in all ARM and DSP processors (...)

No disponible en TI.com
Sonda de depuración

LB-3P-TRACE32-ARM — Sistema de depuración y seguimiento Lauterbach TRACE32 para microcontroladores y procesadores basado

Lauterbach‘s TRACE32® tools are a suite of leading-edge hardware and software components that enables developers to analyze, optimize and certify all kinds of Arm®-based microcontrollers and processors. The globally renowned debug and trace solutions for embedded systems and SoCs are the perfect (...)

Desde: Lauterbach GmbH
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Kit de desarrollo de software (SDK)

PROCESSOR-SDK-LINUX-AM335X — Linux Processor SDK for AM335x

Processor SDK (Software Development Kit) is a unified software platform for TI embedded processors providing easy setup and fast out-of-the-box access to benchmarks and demos.  All releases of Processor SDK are consistent across TI’s broad portfolio, allowing developers to seamlessly (...)

Productos y hardware compatibles

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Opciones de descarga
Kit de desarrollo de software (SDK)

PROCESSOR-SDK-LINUX-RT-AM335X — Linux-RT Processor SDK for AM335x

Processor SDK (Software Development Kit) is a unified software platform for TI embedded processors providing easy setup and fast out-of-the-box access to benchmarks and demos.  All releases of Processor SDK are consistent across TI’s broad portfolio, allowing developers to seamlessly (...)

Productos y hardware compatibles

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Kit de desarrollo de software (SDK)

PROCESSOR-SDK-RTOS-AM335X — TI-RTOS Processor SDK for AM335x and AMIC110 devices (No design support from TI available. Refer to Overview- RTOS Highlights for details.)

Processor SDK (Software Development Kit) is a unified software platform for TI embedded processors providing easy setup and fast out-of-the-box access to benchmarks and demos.  All releases of Processor SDK are consistent across TI’s broad portfolio, allowing developers to seamlessly (...)

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Kit de desarrollo de software (SDK)

TI-15-4-STACK-GATEWAY-LINUX-SDK — TI 15-4-Stack Gateway Linux Software Development Kit

The TI-15.4-Stack-Gateway-Linux Software Development Kit (SDK) provides a Linux software middleware for the TI 15.4-Stack companion solution. It includes a full Linux user-space software that runs on top of the TI Processor SDK for AM335x platform, which interfaces with the co-processor embedded (...)

Productos y hardware compatibles

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Kit de desarrollo de software (SDK)

TIBLUETOOTHSTACK-SDK — Pila Bluetooth® de modo doble de TI

La pila Bluetooth de modo doble de TI permite Bluetooth + Bluetooth baja energía y se compone de ofertas de modo simple y modo doble que implementan la especificación Bluetooth 4.0/4.1/4.2. La pila Bluetooth está totalmente calificada, certificada y libre de regalías por el Bluetooth Special (...)
Guía del usuario: PDF | HTML
Guía del usuario: PDF
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Controlador o biblioteca

PRU-ICSS-ETHERNETIP-ADAPTER — PRU-ICSS software for EtherNetIP adapter

The PRU-ICSS Protocols enables real-time industrial communications for TI Sitara processors.  The PRU-ICSS protocols are built to use on top of Processor-SDK-RTOS, TI’s unified software development platform, and contain optimized PRU-ICSS firmware, a corresponding PRU-ICSS driver for the (...)

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Opciones de descarga
Controlador o biblioteca

PRU-ICSS-HSR-PRP-DAN — PRU-ICSS software for HSR/PRP

The PRU-ICSS Protocols enables real-time industrial communications for TI Sitara processors.  The PRU-ICSS protocols are built to use on top of Processor-SDK-RTOS, TI’s unified software development platform, and contain optimized PRU-ICSS firmware, a corresponding PRU-ICSS driver for the (...)

Productos y hardware compatibles

Productos y hardware compatibles
Opciones de descarga
Controlador o biblioteca

PRU-ICSS-PROFIBUS-SLAVE — PRU-ICSS software for PROFIBUS slave

The PRU-ICSS Protocols enables real-time industrial communications for TI Sitara processors.  The PRU-ICSS protocols are built to use on top of Processor-SDK-RTOS, TI’s unified software development platform, and contain optimized PRU-ICSS firmware, a corresponding PRU-ICSS driver for the (...)

Productos y hardware compatibles

Productos y hardware compatibles
Opciones de descarga
Controlador o biblioteca

PRU-ICSS-PROFINET-SLAVE — PRU-ICSS software for Profinet slave

The PRU-ICSS Protocols enables real-time industrial communications for TI Sitara processors.  The PRU-ICSS protocols are built to use on top of Processor-SDK-RTOS, TI’s unified software development platform, and contain optimized PRU-ICSS firmware, a corresponding PRU-ICSS driver for the (...)

Productos y hardware compatibles

Productos y hardware compatibles
Opciones de descarga
Controlador o biblioteca

WIND-3P-VXWORKS-LINUX-OS — Procesadores Wind River VxWorks y sistemas operativos de Linux

Wind River is a global leader in delivering software for the Internet of Things (IoT). The company’s technology has been powering the safest, most secure devices in the world since 1981 and today is found in more than 2 billion products. Wind River offers a comprehensive edge-to-cloud product (...)
Desde: Wind River Systems
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Controlador o biblioteca

WIT-3P-SITARABSP — Sistemas operativos Android y Windows para Witekio Sitara

Witekio brings expertise on low (OS, driver, firmware) and high level software (application, connectivity, cloud) for TI's OMAP and Sitara AM335x, AM437x, and AM57x platforms. Witekio offers BSPs, drivers, application development/UI/custom drivers for Android, Linux and Windows embedded systems as (...)
Desde: Witekio
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IDE, configuración, compilador o depurador

CCSTUDIO — Code Composer Studio™ integrated development environment (IDE)

Code Composer Studio is an integrated development environment (IDE) for TI's microcontrollers and processors. It is comprised of a rich suite of tools used to build, debug, analyze and optimize embedded applications. Code Composer Studio is available across Windows®, Linux® and macOS® platforms.

(...)

Productos y hardware compatibles

Productos y hardware compatibles
Iniciar Opciones de descarga
IDE, configuración, compilador o depurador

SYSCONFIG — Standalone desktop version of SysConfig

SysConfig is a configuration tool designed to simplify hardware and software configuration challenges to accelerate software development.

SysConfig is available as part of the Code Composer Studio™ integrated development environment as well as a standalone application. Additionally SysConfig (...)

Productos y hardware compatibles

Productos y hardware compatibles
Iniciar Opciones de descarga
Capacitación en línea

BOOTL-3P-TRAINING — Formación de desarrollo de software integrado para procesadores basados en TI Arm

Desde: Bootlin
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Sistema operativo (SO)

GHS-3P-INTEGRITY-RTOS — INTEGRITY RTOS de Green Hills

The flagship of Green Hills Software operating systems—the INTEGRITY RTOS—is built around a partitioning architecture to provide embedded systems with total reliability, absolute security, and maximum real-time performance. With its leadership pedigree underscored by certifications in a (...)
Desde: Green Hills Software
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Sistema operativo (SO)

MG-3P-NUCLEUS-RTOS — Mentor Graphics Nucleus RTOS

Software driven power management is crucial for battery operated or low power budget embedded systems. Embedded developers can now take advantage of the latest power saving features in popular TI devices with the built-in Power Management Framework in the Nucleus RTOS. Developers specify (...)
Desde: Mentor Graphics Corporation
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Sistema operativo (SO)

QNX-3P-NEUTRINO-RTOS — QNX Neutrino RTOS

The QNX Neutrino® Realtime Operating System (RTOS) is a full-featured and robust RTOS designed to enable the next-generation of products for automotive, medical, transportation, military and industrial embedded systems. Microkernel design and modular architecture enable customers to create (...)
Desde: QNX Software Systems
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Herramienta de programación de software

SITARA-DDR-CONFIG-TOOL-AM335X — AM335x and AMIC110 EMIF Tools

The Sitara™ EMIF tool is a software tool which provides an interface to configure the TI processors for accessing the external DDR memory devices. The tool also optimizes the Delay Locked Loop (DLL) settings to compensate for board routing skews. The results are output as EMIF configuration (...)

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Herramienta de programación de software

UNIFLASH — UniFlash for most TI microcontrollers (MCUs) and mmWave sensors

UniFlash is a software tool for programming on-chip flash on TI microcontrollers and wireless connectivity devices and on-board flash for TI processors. UniFlash provides both graphical and command-line interfaces.

UniFlash can be run from the cloud on the TI Developer Zone or downloaded and used (...)

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Soporte de software

AUTOMATA-3P-INDUSTRIALCOMMS — Cannon Automata Sercos III

The Sercos III Slave Communiction Stack allows to implement the Real-time Ethernet protocol Sercos III for any kind of slave devices. The source code includes SCP (Sercos Communication Profile) and GDP (General Device Profile). In addition, the stack already includes many optional function classes (...)
Desde: AUTOMATA
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Soporte de software

CLRNX-3P-CLARIFI — Depurador inalámbrico integrado ClariFi de Clarinox

ClariFi™ proporciona un analizador de protocolos integrado que admite una depuración más rápida de dispositivos inalámbricos complejos y se utiliza con nuestro middleware de capa de abstracción SoftFrame fácil de usar. Ofrece ejecución de subprocesos, así como análisis de uso de memoria y de fugas (...)
Desde: Clarinox
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Soporte de software

CLRNX-3P-CLARINOX-BLUE — Pila de protocolos Bluetooth® integrada ClarinoxBlue

La pila de protocolos ClarinoxBlue™ fue diseñada por y para desarrolladores de productos integrados. Gracias a que cuenta con enfoque simple y flexible, la pila de protocolos ClarinoxBlue le permite dedicar más tiempo a su aplicación en lugar de al funcionamiento interno de la tecnología Bluetooth. (...)
Desde: Clarinox
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Soporte de software

CLRNX-3P-CLARINOX-WIFI — Pila de protocolos Wi-Fi integrada ClarinoxWiFi

ClarinoxWiFi es una pila de protocolo Wi-Fi puesta a prueba que ofrece funciones AP, STA, P2P y Mesh, y soporte para una amplia gama de diferentes sistemas operativos en tiempo real (RTOS) y microcontroladores (MCU). ClarinoxWiFi les otorga a los desarrolladores la capacidad de crear conexiones (...)
Desde: Clarinox
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Modelo de simulación

AM335x Thermal Model

SPRM824.ZIP (10 KB) - Thermal Model
Descargar
Modelo de simulación

AM335x ZCE IBIS Model (Rev. B)

SPRM556B.ZIP (21124 KB) - IBIS Model
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Modelo de simulación

AM335x ZCE Rev. 2.0 BSDL Model (Rev. A)

SPRM548A.ZIP (8 KB) - BSDL Model
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Modelo de simulación

AM335x ZCE Rev. 2.1 BSDL Model

SPRM606.ZIP (8 KB) - BSDL Model
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Modelo de simulación

AM335x ZCZ IBIS Model (Rev. C)

SPRM552C.ZIP (21721 KB) - IBIS Model
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Modelo de simulación

AM335x ZCZ Rev. 2.0 BSDL Model (Rev. A)

SPRM549A.ZIP (8 KB) - BSDL Model
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Modelo de simulación

AM335x ZCZ Rev. 2.1 BSDL Model

SPRM607.ZIP (8 KB) - BSDL Model
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Herramienta de cálculo

AM335-PET-CALC — AM335x Power Estimation Tool

Power Estimation Tool (PET) provides users the ability to gain insight in to the power consumption of select TI processors. The tool includes the ability for the user to choose multiple application scenarios and understand the power consumption as well as how advanced power saving techniques can be (...)

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Herramienta de cálculo

CLOCKTREETOOL — Herramienta de árbol de reloj para Sitara, automoción, análisis de visión y procesadores de señal di

The Clock Tree Tool (CTT) for Sitara™ ARM®, Automotive, and Digital Signal Processors is an interactive clock tree configuration software that provides information about the clocks and modules in these TI devices. It allows the user to:
  • Visualize the device clock tree
  • Interact with clock tree (...)
Guía del usuario: PDF
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Herramienta de cálculo

POWEREST — Herramienta de estimación de potencia (PET)

La herramienta de estimación de potencia (PET) ofrece a los usuarios la posibilidad de obtener información detallada sobre el consumo de potencia de determinados procesadores TI. La herramienta incluye la posibilidad de que el usuario elija múltiples escenarios de aplicación y comprenda el consumo (...)
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Herramienta de cálculo

SITARA-DDR-CONFIG-TOOL — Herramienta Sitara External Memory Interface (EMIF)

La herramienta Sitara™ EMIF es una herramienta de software que proporciona una interfaz para configurar los procesadores TI para acceder a los dispositivos de memoria DDR externos. La herramienta también optimiza la configuración del bucle de retardo bloqueado (DLL) para compensar las desviaciones (...)
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Herramienta de cálculo

SITARA-DDR-CONFIG-TOOL-AM65X-DRA80XM — AM65x/DRA80xM EMIF Tool Spreadsheet

The Sitara™ EMIF tool is a software tool which provides an interface to configure the TI processors for accessing the external DDR memory devices. The tool also optimizes the Delay Locked Loop (DLL) settings to compensate for board routing skews. The results are output as EMIF configuration (...)

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Muchos diseños de referencia de TI incluyen AM3358

Utilice nuestra herramienta de selección de diseños de referencia para revisar e identificar los diseños que mejor se adaptan a su aplicación y parámetros.

Ver diseños de referencia
Encapsulado Pines Símbolos CAD, huellas y modelos 3D
NFBGA (ZCE) 298 Ultra Librarian
NFBGA (ZCZ) 324 Ultra Librarian
Se aplican los Términos y condiciones estándar de TI para los elementos de evaluación.

Pedidos y calidad

Información incluida:
  • RoHS
  • REACH
  • Marcado del dispositivo
  • Acabado de plomo/material de la bola
  • Clasificación de nivel de sensibilidad a la humedad (MSL)/reflujo máximo
  • Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
  • Contenido del material
  • Resumen de calificaciones
  • Monitoreo continuo de confiabilidad
Información incluida:
  • Lugar de fabricación
  • Lugar de ensamblaje

Los productos recomendados pueden tener parámetros, módulos de evaluación o diseños de referencia relacionados con este producto de TI.

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