Inicio Interfaz Circuitos integrados de interfaz digital serie (SDI)

CLC001

ACTIVO

Driver de cable SEMPTE 259M de referencia a tierra de 3,3 V.

Detalles del producto

Function Cable driver Power consumption (mW) 230 Data rate (max) (Mbps) 622 Control interface Pin Operating temperature range (°C) -40 to 85
Function Cable driver Power consumption (mW) 230 Data rate (max) (Mbps) 622 Control interface Pin Operating temperature range (°C) -40 to 85
SOIC (D) 8 29.4 mm² (4.9 mm × 6 mm)
  • Adjustable output amplitude
  • Differential input and output
  • Accepts LVPECL or LVDS input swings
  • Low power dissipation
  • Single +3.3V supply

  • Adjustable output amplitude
  • Differential input and output
  • Accepts LVPECL or LVDS input swings
  • Low power dissipation
  • Single +3.3V supply

The CLC001 is a monolithic, high-speed cable driver designed for use in SMPTE 259M serial digital video and ITU-T G.703 serial digital data transmission applications. The CLC001 drives 75 transmission lines (Belden 8281 or equivalent) at data rates up to 622 Mbps. Controlled output rise and fall times (400 ps typical) minimize transition-induced jitter. The output voltage swing is adjustable from 800 mVp-p to 1.0 Vp-p using an external resistor.

The CLC001's output stage consumes less power than other designs. The differential inputs accept LVDS signal levels, LVPECL levels directly or PECL with attenuation networks.

All these make the CLC001 an excellent general purpose high speed driver for high-speed, long distance data transmission applications.

The CLC001 is powered from a single +3.3V supply and comes in a small 8-pin SOIC package.


Key Specifications

  • 400 ps rise and fall times
  • Data rates to 622 Mbps
  • 100 mV differential input threshold
  • Low residual jitter

The CLC001 is a monolithic, high-speed cable driver designed for use in SMPTE 259M serial digital video and ITU-T G.703 serial digital data transmission applications. The CLC001 drives 75 transmission lines (Belden 8281 or equivalent) at data rates up to 622 Mbps. Controlled output rise and fall times (400 ps typical) minimize transition-induced jitter. The output voltage swing is adjustable from 800 mVp-p to 1.0 Vp-p using an external resistor.

The CLC001's output stage consumes less power than other designs. The differential inputs accept LVDS signal levels, LVPECL levels directly or PECL with attenuation networks.

All these make the CLC001 an excellent general purpose high speed driver for high-speed, long distance data transmission applications.

The CLC001 is powered from a single +3.3V supply and comes in a small 8-pin SOIC package.


Key Specifications

  • 400 ps rise and fall times
  • Data rates to 622 Mbps
  • 100 mV differential input threshold
  • Low residual jitter

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Documentación técnica

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Documentación principal Tipo Título Opciones de formato Descargar la versión más reciente en inglés Fecha
* Hoja de datos CLC001 Serial Digital Cable Driver with Adjustable Outputs datasheet (Rev. B) 15/02/2006
Nota sobre la aplicación AN-2145 Power Considerations for SDI Products (Rev. B) 26/04/2013
Nota sobre la aplicación AN-2146 Power Design for SDI and Other Noise-Sensitive Devices (Rev. A) 26/04/2013
Nota sobre la aplicación AN-1943 Understanding Serial Digital Video Bit Rates (Rev. A) 26/04/2013
Nota sobre la aplicación AN-2059 Replacing the CLC001 Cable Driver with the LMH0001 (Rev. B) 26/04/2013
Nota sobre la aplicación High-Speed Board Layout Challenges in FPGA/SDI Sub-Systems 12/11/2009
Informe Hundreds of Megabits @ Hundreds of Meters: Extend the Transmis Length for LVDS 1/09/2004
Nota sobre la aplicación 3.3V Cable Driver And Equalizer Drive Mega-Bits @ Many Meters 6/03/2003
Informe Making the Most of Your LVDS - 5 Tips for Buffering Signal Integrity Headaches 1/08/2001

Diseño y desarrollo

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Modelo de simulación

CLC001 IBIS Model

SNLM003.ZIP (5 KB) - Modelo IBIS
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