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DS38EP100

ACTIVO

Ecualizador de 1 a 5 Gbps y ahorro de energía para planos posteriores y cables

Detalles del producto

Function Equalizer Protocols CML, LVDS, LVPECL Number of transmitters 1 Number of receivers 1 Signaling rate (Mbps) 5000 Input signal CML, LVDS, LVPECL Output signal CML, LVDS, LVPECL Rating Catalog Operating temperature range (°C) -40 to 85
Function Equalizer Protocols CML, LVDS, LVPECL Number of transmitters 1 Number of receivers 1 Signaling rate (Mbps) 5000 Input signal CML, LVDS, LVPECL Output signal CML, LVDS, LVPECL Rating Catalog Operating temperature range (°C) -40 to 85
WSON (NGF) 6 5.5 mm² 2.5 x 2.2
  • 1 to 5 Gbps Operation
  • No Power or Ground Required
  • Equalization Effective Anywhere in Data Path
  • Equalizes CML, LV-PECL, LVDS Signals
  • Symmetric I/O Structures Provide Equal Boost for Bi-directional Operation
  • 7 dB Maximum Boost
  • Code Independent, 8b/10b or Scrambled
  • Supports Both Bi-level and Multi-level Signaling
  • Extends Reach Over Backplanes and Cables
  • Compatible with PCI-Express Gen1 and Gen2
  • Compatible with XAUI
  • Operates in Series with Existing Active Equalizer
  • Easy to Handle 6 Pin WSON

All trademarks are the property of their respective owners.

  • 1 to 5 Gbps Operation
  • No Power or Ground Required
  • Equalization Effective Anywhere in Data Path
  • Equalizes CML, LV-PECL, LVDS Signals
  • Symmetric I/O Structures Provide Equal Boost for Bi-directional Operation
  • 7 dB Maximum Boost
  • Code Independent, 8b/10b or Scrambled
  • Supports Both Bi-level and Multi-level Signaling
  • Extends Reach Over Backplanes and Cables
  • Compatible with PCI-Express Gen1 and Gen2
  • Compatible with XAUI
  • Operates in Series with Existing Active Equalizer
  • Easy to Handle 6 Pin WSON

All trademarks are the property of their respective owners.

TI’s Power-saver equalizer compensates for transmission medium losses and minimizes medium-induced deterministic jitter. Performance is ensured over the full range of 1 to 5 Gbps. The DS38EP100 requires no power to operate. The equalizer operates anywhere in the data path to minimize media-induced deterministic jitter in both FR4 and cable applications. Symmetric I/O structures support full duplex or half duplex applications. Linear compensation is provided independent of line coding or protocol. The device is ideal for both bi-level and multi-level signaling.

The equalizer is available in a 6 pin leadless WSON package with a space saving 2.2 mm X 2.5 mm footprint. This tiny package provides maximum flexibility in placement and routing of the Power-saver equalizer.

TI’s Power-saver equalizer compensates for transmission medium losses and minimizes medium-induced deterministic jitter. Performance is ensured over the full range of 1 to 5 Gbps. The DS38EP100 requires no power to operate. The equalizer operates anywhere in the data path to minimize media-induced deterministic jitter in both FR4 and cable applications. Symmetric I/O structures support full duplex or half duplex applications. Linear compensation is provided independent of line coding or protocol. The device is ideal for both bi-level and multi-level signaling.

The equalizer is available in a 6 pin leadless WSON package with a space saving 2.2 mm X 2.5 mm footprint. This tiny package provides maximum flexibility in placement and routing of the Power-saver equalizer.

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Documentación técnica

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Tipo Título Fecha
* Data sheet DS38EP100 1 to 5 Gbps, Power-Saver Equalizer for Backplanes and Cables datasheet (Rev. C) 25 abr 2013
User guide DS38EP100-EVKH HDMI Tiny Kit User Guide 20 feb 2012
User guide DS80EP100-EVK / DS38EP100-EVK User Guide 20 feb 2012

Diseño y desarrollo

Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.

Modelo de simulación

DS38EP100 S-Parameter Model

SNLM273.ZIP (30 KB) - S-Parameter Model
Herramienta de simulación

PSPICE-FOR-TI — PSpice® para herramienta de diseño y simulación de TI

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Herramienta de simulación

TINA-TI — Programa de simulación analógica basado en SPICE

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
Guía del usuario: PDF
Encapsulado Pines Símbolos CAD, huellas y modelos 3D
WSON (NGF) 6 Ultra Librarian

Pedidos y calidad

Información incluida:
  • RoHS
  • REACH
  • Marcado del dispositivo
  • Acabado de plomo/material de la bola
  • Clasificación de nivel de sensibilidad a la humedad (MSL) / reflujo máximo
  • Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
  • Contenido del material
  • Resumen de calificaciones
  • Monitoreo continuo de confiabilidad
Información incluida:
  • Lugar de fabricación
  • Lugar de ensamblaje

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Soporte y capacitación

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