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DS90C032QML-SP

ACTIVO

Receptor de línea diferencial CMOS cuádruple LVDS

Detalles del producto

Function Receiver Protocols LVDS Number of transmitters 0 Number of receivers 4 Supply voltage (V) 5 Signaling rate (Mbps) 155.5 Input signal LVDS Output signal TTL Rating Space Operating temperature range (°C) -55 to 125
Function Receiver Protocols LVDS Number of transmitters 0 Number of receivers 4 Supply voltage (V) 5 Signaling rate (Mbps) 155.5 Input signal LVDS Output signal TTL Rating Space Operating temperature range (°C) -55 to 125
CFP (NAC) 16 62.9285 mm² 9.91 x 6.35 CFP (NAD) 16 62.9285 mm² 9.91 x 6.35 DIESALE (Y) See data sheet
  • Single Event Latchup (SEL) Immune 120 MeV-cm2/mg
  • High Impedance LVDS Inputs with Power-Off.
  • Accepts Small Swing (330 mV) Differential Signal Levels
  • Low Power Dissipation
  • Low Differential Skew
  • Low Chip to Chip Skew
  • Pin Compatible with DS26C32A
  • Compatible with IEEE 1596.3 SCI LVDS Standard

All trademarks are the property of their respective owners.

  • Single Event Latchup (SEL) Immune 120 MeV-cm2/mg
  • High Impedance LVDS Inputs with Power-Off.
  • Accepts Small Swing (330 mV) Differential Signal Levels
  • Low Power Dissipation
  • Low Differential Skew
  • Low Chip to Chip Skew
  • Pin Compatible with DS26C32A
  • Compatible with IEEE 1596.3 SCI LVDS Standard

All trademarks are the property of their respective owners.

The DS90C032 is a quad CMOS differential line receiver designed for applications requiring ultra low power dissipation and high data rates.

The DS90C032 accepts low voltage differential input signals and translates them to CMOS (TTL compatible) output levels. The receiver supports a TRI-STATE function that may be used to multiplex outputs. The receiver also supports OPEN Failsafe and terminated (100Ω) input Failsafe with the addition of external failsafe biasing. Receiver output will be HIGH for both Failsafe conditions.

The DS90C032 provides power-off high impedance LVDS inputs. This feature assures minimal loading effect on the LVDS bus lines when VCC is not present.

The DS90C032 and companion line driver (DS90C031) provide a new alternative to high power pseudo-ECL devices for high speed point-to-point interface applications.

The DS90C032 is a quad CMOS differential line receiver designed for applications requiring ultra low power dissipation and high data rates.

The DS90C032 accepts low voltage differential input signals and translates them to CMOS (TTL compatible) output levels. The receiver supports a TRI-STATE function that may be used to multiplex outputs. The receiver also supports OPEN Failsafe and terminated (100Ω) input Failsafe with the addition of external failsafe biasing. Receiver output will be HIGH for both Failsafe conditions.

The DS90C032 provides power-off high impedance LVDS inputs. This feature assures minimal loading effect on the LVDS bus lines when VCC is not present.

The DS90C032 and companion line driver (DS90C031) provide a new alternative to high power pseudo-ECL devices for high speed point-to-point interface applications.

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Documentación técnica

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Tipo Título Fecha
* Data sheet DS90C032QML LVDS Quad CMOS Differential Line Receiver datasheet (Rev. D) 12 abr 2013
* SMD DS90C032QML-SP SMD 5962-95834 21 jun 2016
* Radiation & reliability report DS90C032xLQMLV SEE Report 09 may 2012
* Radiation & reliability report DS90C032xLQMLV TID Report 09 may 2012
Application brief DLA Approved Optimizations for QML Products (Rev. B) PDF | HTML 23 oct 2024
Selection guide TI Space Products (Rev. J) 12 feb 2024
More literature TI Engineering Evaluation Units vs. MIL-PRF-38535 QML Class V Processing (Rev. A) 31 ago 2023
Application note Heavy Ion Orbital Environment Single-Event Effects Estimations (Rev. A) PDF | HTML 17 nov 2022
Application note Single-Event Effects Confidence Interval Calculations (Rev. A) PDF | HTML 19 oct 2022
Application brief How Far, How Fast Can You Operate LVDS Drivers and Receivers? 03 ago 2018
Application brief How to Terminate LVDS Connections with DC and AC Coupling 16 may 2018
More literature Die D/S DS90C032 MDR Lvds Quad Cmos Differential Line Receiver 07 sep 2012
Application note AN-1110 LVDS Quad Dynamic I CC vs Frequency 15 may 2004

Diseño y desarrollo

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Herramienta de simulación

PSPICE-FOR-TI — PSpice® para herramienta de diseño y simulación de TI

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Herramienta de simulación

TINA-TI — Programa de simulación analógica basado en SPICE

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
Guía del usuario: PDF
Encapsulado Pines Símbolos CAD, huellas y modelos 3D
CFP (NAC) 16 Ultra Librarian
CFP (NAD) 16 Ultra Librarian
DIESALE (Y)

Pedidos y calidad

Información incluida:
  • RoHS
  • REACH
  • Marcado del dispositivo
  • Acabado de plomo/material de la bola
  • Clasificación de nivel de sensibilidad a la humedad (MSL) / reflujo máximo
  • Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
  • Contenido del material
  • Resumen de calificaciones
  • Monitoreo continuo de confiabilidad
Información incluida:
  • Lugar de fabricación
  • Lugar de ensamblaje

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