Inicio Interfaz Serializadores-deserializadores de alta velocidad Serializadores-deserializadores FPD-Link

DS90UR905Q-Q1

ACTIVO

Serializador FPD-Link II a color de 24 bits y 5 MHz a 65 MHz

Detalles del producto

Function Serializer Color depth (bpp) 24 Input compatibility LVCMOS Output compatibility FPD-Link LVDS Features I2C Config Applications In-vehicle Infotainment (IVI) EMI reduction SSC Compatible Rating Automotive Operating temperature range (°C) -40 to 105
Function Serializer Color depth (bpp) 24 Input compatibility LVCMOS Output compatibility FPD-Link LVDS Features I2C Config Applications In-vehicle Infotainment (IVI) EMI reduction SSC Compatible Rating Automotive Operating temperature range (°C) -40 to 105
WQFN (RHS) 48 49 mm² 7 x 7
  • 5- to 65-MHz PCLK support (140 Mbps to
    1.82 Gbps)
  • AC-Coupled STP interconnect cable up to 10 meters
  • Integrated terminations on serializer and deserializer
  • At speed link BIST mode and reporting pin
  • Optional I2C-compatible serial control bus
  • RGB888 + VS, HS, DE support
  • Power down mode minimizes power dissipation
  • 1.8-V or 3.3-V compatible LVCMOS I/O interface
  • Automotive-grade product: AEC-Q100 grade 2 qualified
  • >8-kV HBM and ISO 10605 ESD rating
  • Backward compatible mode for operation with older generation devices
  • SERIALIZER — DS90UR905Q-Q1
    • RGB888 + VS/HS/DE serialized to 1 Pair FPD-Link II
    • Randomizer/scrambler — DC-balanced data stream
    • Selectable output VOD and adjustable de-emphasis
  • DESERIALIZER — DS90UR906Q-Q1
    • FAST random data lock; no reference clock required
    • Adjustable input receiver equalization
    • LOCK (real time link status) reporting pin
    • EMI minimization on output parallel bus (SSCG)
    • Output slew control (OS)
  • 5- to 65-MHz PCLK support (140 Mbps to
    1.82 Gbps)
  • AC-Coupled STP interconnect cable up to 10 meters
  • Integrated terminations on serializer and deserializer
  • At speed link BIST mode and reporting pin
  • Optional I2C-compatible serial control bus
  • RGB888 + VS, HS, DE support
  • Power down mode minimizes power dissipation
  • 1.8-V or 3.3-V compatible LVCMOS I/O interface
  • Automotive-grade product: AEC-Q100 grade 2 qualified
  • >8-kV HBM and ISO 10605 ESD rating
  • Backward compatible mode for operation with older generation devices
  • SERIALIZER — DS90UR905Q-Q1
    • RGB888 + VS/HS/DE serialized to 1 Pair FPD-Link II
    • Randomizer/scrambler — DC-balanced data stream
    • Selectable output VOD and adjustable de-emphasis
  • DESERIALIZER — DS90UR906Q-Q1
    • FAST random data lock; no reference clock required
    • Adjustable input receiver equalization
    • LOCK (real time link status) reporting pin
    • EMI minimization on output parallel bus (SSCG)
    • Output slew control (OS)

The DS90UR90xQ-Q1 chipset translates a parallel RGB video interface into a high-speed serialized interface over a single pair. This serial bus scheme makes system design easy by eliminating skew problems between clock and data, reducing the number of connector pins, reducing the interconnect size, weight, cost, and easing overall PCB layout. In addition, internal DC-balanced decoding is used to support AC-coupled interconnects.

The DS90UR905Q-Q1 serializer embeds the clock, balances the data payload, and level shifts the signals to high-speed, low voltage differential signaling. Up to 24 inputs are serialized, along with the three video control signals. This supports full
24-bit color or 18-bit color and 6 general-purpose signals (for example, Audio I2S applications).

The DS90UR906Q-Q1 deserializer recovers the data (RGB) and control signals and extracts the clock from the serial stream. The DS90UR906Q-Q1 is able to lock to the incoming data stream without the use of a training sequence or special SYNC patterns and does not require a reference clock. A link status (LOCK) output signal is provided.

Serial transmission is optimized by a user-selectable de-emphasis, differential output level select features, and receiver equalization. EMI is minimized by the use of low voltage differential signaling, receiver drive strength control, and spread spectrum clocking compatibility. The deserializer may be configured to generate spread spectrum clock and data on its parallel outputs.

The DS90UR905Q-Q1 serializer is offered in a 48-pin WQFN and the DS90UR906Q-Q1 (deserializer) is offered in a 60-pin WQFN package. They are specified over the automotive AEC-Q100 grade 2 temperature range of –40°C to +105°C.

The DS90UR90xQ-Q1 chipset translates a parallel RGB video interface into a high-speed serialized interface over a single pair. This serial bus scheme makes system design easy by eliminating skew problems between clock and data, reducing the number of connector pins, reducing the interconnect size, weight, cost, and easing overall PCB layout. In addition, internal DC-balanced decoding is used to support AC-coupled interconnects.

The DS90UR905Q-Q1 serializer embeds the clock, balances the data payload, and level shifts the signals to high-speed, low voltage differential signaling. Up to 24 inputs are serialized, along with the three video control signals. This supports full
24-bit color or 18-bit color and 6 general-purpose signals (for example, Audio I2S applications).

The DS90UR906Q-Q1 deserializer recovers the data (RGB) and control signals and extracts the clock from the serial stream. The DS90UR906Q-Q1 is able to lock to the incoming data stream without the use of a training sequence or special SYNC patterns and does not require a reference clock. A link status (LOCK) output signal is provided.

Serial transmission is optimized by a user-selectable de-emphasis, differential output level select features, and receiver equalization. EMI is minimized by the use of low voltage differential signaling, receiver drive strength control, and spread spectrum clocking compatibility. The deserializer may be configured to generate spread spectrum clock and data on its parallel outputs.

The DS90UR905Q-Q1 serializer is offered in a 48-pin WQFN and the DS90UR906Q-Q1 (deserializer) is offered in a 60-pin WQFN package. They are specified over the automotive AEC-Q100 grade 2 temperature range of –40°C to +105°C.

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Documentación técnica

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* Data sheet DS90UR90xQ-Q1 5- to 65-MHz, 24-bit Color FPD-Link II Serializer and Deserializer datasheet (Rev. I) PDF | HTML 03 oct 2019
Application note LVDS Repeaters and Crosspoints Extend the Reach of FPD-Link II Interfaces (Rev. A) 29 abr 2013
Application note AN-1807 FPD-Link II Display SerDes Overview (Rev. B) 26 abr 2013
Application note Extending the Reach of a FPD-Link II Interface with Cable Drivers and Equalizers (Rev. A) 26 abr 2013
User guide DVI - FPD LINK II (DS90UR905Q/906Q) Demo Platform User Guide 15 jun 2012

Diseño y desarrollo

Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.

Modelo de simulación

DS90UR905Q IBIS Model

SNLM114.ZIP (74 KB) - IBIS Model
Herramienta de simulación

PSPICE-FOR-TI — PSpice® para herramienta de diseño y simulación de TI

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Herramienta de simulación

TINA-TI — Programa de simulación analógica basado en SPICE

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
Guía del usuario: PDF
Encapsulado Pines Símbolos CAD, huellas y modelos 3D
WQFN (RHS) 48 Ultra Librarian

Pedidos y calidad

Información incluida:
  • RoHS
  • REACH
  • Marcado del dispositivo
  • Acabado de plomo/material de la bola
  • Clasificación de nivel de sensibilidad a la humedad (MSL) / reflujo máximo
  • Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
  • Contenido del material
  • Resumen de calificaciones
  • Monitoreo continuo de confiabilidad
Información incluida:
  • Lugar de fabricación
  • Lugar de ensamblaje

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