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Circuitos integrados LVDS, M-LVDS y PECL

SN65LVDM31

ACTIVO

Controlador LVDM cuádruple

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SN65LVDM31

ACTIVO
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Detalles del producto

Function Driver Protocols LVDM, LVDS Number of transmitters 4 Number of receivers 0 Signaling rate (Mbps) 150 Input signal LVCMOS Output signal LVDM Rating Catalog Operating temperature range (°C) -40 to 85
Function Driver Protocols LVDM, LVDS Number of transmitters 4 Number of receivers 0 Signaling rate (Mbps) 150 Input signal LVCMOS Output signal LVDM Rating Catalog Operating temperature range (°C) -40 to 85
SOIC (D) 16 59.4 mm² (9.9 mm × 6 mm)
  • Designed for Signaling Rates Up to 150 Mbps
  • Low-Voltage Differential Signaling With Typical Output Voltage of 700 mV and a 100- Load
  • Propagation Delay Time of 2.3 ns, Typical
  • Single 3.3-V Supply Operation
  • One Driver's Power Dissipation at 75 MHz, 50 mW, Typical
  • High-Impedance Outputs When Disabled or With VCC < 1.5 V
  • Bus-Pin ESD Protection Exceeds 12 kV
  • Low-Voltage CMOS (LVCMOS) Logic Input Levels Are 5-V Tolerant

The signaling rate is the number of voltage transitions that can be made per second.
  • Designed for Signaling Rates Up to 150 Mbps
  • Low-Voltage Differential Signaling With Typical Output Voltage of 700 mV and a 100- Load
  • Propagation Delay Time of 2.3 ns, Typical
  • Single 3.3-V Supply Operation
  • One Driver's Power Dissipation at 75 MHz, 50 mW, Typical
  • High-Impedance Outputs When Disabled or With VCC < 1.5 V
  • Bus-Pin ESD Protection Exceeds 12 kV
  • Low-Voltage CMOS (LVCMOS) Logic Input Levels Are 5-V Tolerant

The signaling rate is the number of voltage transitions that can be made per second.

The SN65LVDM31 incorporates four differential line drivers that implement the electrical characteristics of low-voltage differential signaling. This product offers a low-power alternative to 5-V PECL drivers with similar signal levels. Any of the four current-mode drivers will deliver a minimum differential output voltage magnitude of 540 mV into a 100- load when enabled by either an active-low or active-high enable input.

The intended application of this device and signaling technique is for both point-to-point and multiplexed baseband data transmission over controlled impedance media of approximately 100 . The transmission media may be printed-circuit board traces, backplanes, or cables. The ultimate rate and distance of data transfer is dependent upon the attenuation characteristics of the media and the noise coupling to the environment.

The SN65LVDM31 is characterized for operation from -40°C to 85°C.

The SN65LVDM31 incorporates four differential line drivers that implement the electrical characteristics of low-voltage differential signaling. This product offers a low-power alternative to 5-V PECL drivers with similar signal levels. Any of the four current-mode drivers will deliver a minimum differential output voltage magnitude of 540 mV into a 100- load when enabled by either an active-low or active-high enable input.

The intended application of this device and signaling technique is for both point-to-point and multiplexed baseband data transmission over controlled impedance media of approximately 100 . The transmission media may be printed-circuit board traces, backplanes, or cables. The ultimate rate and distance of data transfer is dependent upon the attenuation characteristics of the media and the noise coupling to the environment.

The SN65LVDM31 is characterized for operation from -40°C to 85°C.
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Documentación técnica

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Documentación principal Tipo Título Opciones de formato Descargar la versión más reciente en inglés Fecha
* Hoja de datos High Speed Differential Line Driver datasheet (Rev. C) 6/02/2002
Nota sobre la aplicación An Introduction to M-LVDS and Clock and Data Distribution Applications (Rev. C) PDF | HTML 22/06/2023
Application brief How Far, How Fast Can You Operate MLVDS? 6/08/2018
Guía del usuario Low Voltage Differential Signaling (LVDS) Evaluation Module (EVM) for Quad Drive (Rev. C) 16/02/2010
Nota sobre la aplicación SPI-Based Data Acquisition/Monitor Using the TLC2551 Serial ADC (Rev. A) 20/11/2001
Nota sobre la aplicación An Overview of LVDS Technology 5/10/1998

Diseño y desarrollo

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Modelo de simulación

SN65LVDM31 IBIS Model

SLLC092.ZIP (4 KB) - Modelo IBIS
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