Inicio Interfaz Circuitos integrados LVDS, M-LVDS y PECL
Inicio
Interfaz
Circuitos integrados LVDS, M-LVDS y PECL

SN65LVDS3486

ACTIVO

Receptor LVDS cuádruple

Haga su pedido ahora
Hoja de datos

SN65LVDS3486

ACTIVO
Hoja de datos Haga su pedido ahora

Detalles del producto

Function Receiver Protocols LVDS Number of transmitters 0 Number of receivers 4 Supply voltage (V) 3.3 Signaling rate (MBits) 100 Input signal LVDS Output signal LVTTL Rating Catalog Operating temperature range (°C) -40 to 85
Function Receiver Protocols LVDS Number of transmitters 0 Number of receivers 4 Supply voltage (V) 3.3 Signaling rate (MBits) 100 Input signal LVDS Output signal LVTTL Rating Catalog Operating temperature range (°C) -40 to 85
SOIC (D) 16 59.4 mm² 9.9 x 6
  • Meet or Exceed the Requirements of ANSI
    TIA/EIA-644 Standard
  • Operate With a Single 3.3-V Supply
  • Designed for Signaling Rates of up to
    150 Mbps
  • Differential Input Thresholds ±100 mV Max
  • Typical Propagation Delay Time of 2.1 ns
  • Power Dissipation 60 mW Typical Per
    Receiver at Maximum Data Rate
  • Bus-Terminal ESD Protection Exceeds 8 kV
  • Low-Voltage TTL (LVTTL) Logic Output
    Levels
  • Pin Compatible With AM26LS32, MC3486,
    and µA9637
  • Open-Circuit Fail-Safe
  • Cold Sparing for Space and High-Reliability
    Applications Requiring Redundancy
  • Meet or Exceed the Requirements of ANSI
    TIA/EIA-644 Standard
  • Operate With a Single 3.3-V Supply
  • Designed for Signaling Rates of up to
    150 Mbps
  • Differential Input Thresholds ±100 mV Max
  • Typical Propagation Delay Time of 2.1 ns
  • Power Dissipation 60 mW Typical Per
    Receiver at Maximum Data Rate
  • Bus-Terminal ESD Protection Exceeds 8 kV
  • Low-Voltage TTL (LVTTL) Logic Output
    Levels
  • Pin Compatible With AM26LS32, MC3486,
    and µA9637
  • Open-Circuit Fail-Safe
  • Cold Sparing for Space and High-Reliability
    Applications Requiring Redundancy

The SN55LVDS32, SN65LVDS32, SN65LVDS3486, and SN65LVDS9637 devices are differential line receivers that implement the electrical characteristics of low-voltage differential signaling (LVDS). This signaling technique lowers the output voltage levels of 5-V differential standard levels (such as EIA/TIA-422B) to reduce the power, increase the switching speeds, and allow operation with a 3.3-V supply rail. Any of the differential receivers provides a valid logical output state with a ±100-mV differential input voltage within the input common-mode voltage range. The input common-mode voltage range allows 1 V of ground potential difference between two LVDS nodes.

The intended application of these devices and signaling technique is both point-to-point and multidrop (one driver and multiple receivers) data transmission over controlled impedance media of approximately 100 Ω. The transmission media may be printed-circuit board traces, backplanes, or cables. The ultimate rate and distance of data transfer depends on the attenuation characteristics of the media and the noise coupling to the environment.

The SN65LVDS32, SN65LVDS3486, and SN65LVDS9637 devices are characterized for operation from –40°C to 85°C. The SN55LVDS32 device is characterized for operation from –55°C to 125°C.

The SN55LVDS32, SN65LVDS32, SN65LVDS3486, and SN65LVDS9637 devices are differential line receivers that implement the electrical characteristics of low-voltage differential signaling (LVDS). This signaling technique lowers the output voltage levels of 5-V differential standard levels (such as EIA/TIA-422B) to reduce the power, increase the switching speeds, and allow operation with a 3.3-V supply rail. Any of the differential receivers provides a valid logical output state with a ±100-mV differential input voltage within the input common-mode voltage range. The input common-mode voltage range allows 1 V of ground potential difference between two LVDS nodes.

The intended application of these devices and signaling technique is both point-to-point and multidrop (one driver and multiple receivers) data transmission over controlled impedance media of approximately 100 Ω. The transmission media may be printed-circuit board traces, backplanes, or cables. The ultimate rate and distance of data transfer depends on the attenuation characteristics of the media and the noise coupling to the environment.

The SN65LVDS32, SN65LVDS3486, and SN65LVDS9637 devices are characterized for operation from –40°C to 85°C. The SN55LVDS32 device is characterized for operation from –55°C to 125°C.
open-in-new Buscar otro/a Circuitos integrados LVDS, M-LVDS y PECL
Descargar Ver vídeo con transcripción Video

Documentación técnica

star =Principal documentación para este producto seleccionada por TI
No se encontraron resultados. Borre su búsqueda y vuelva a intentarlo.
Ver todo 5
Tipo Título Fecha
* Data sheet SNx5LVDS32, SN65LVDS3486, SN65LVDS9637 High-Speed Differential Line Receivers datasheet (Rev. R) 06 ago 2014
Application brief LVDS to Improve EMC in Motor Drives 27 sep 2018
Application brief How Far, How Fast Can You Operate LVDS Drivers and Receivers? 03 ago 2018
Application brief How to Terminate LVDS Connections with DC and AC Coupling 16 may 2018
Application note An Overview of LVDS Technology 05 oct 1998

Diseño y desarrollo

Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.

Modelo de simulación

SN65LVDS3486 IBIS Model (Rev. A)

SLLC013A.ZIP (4 KB) - IBIS Model
Descargar
Herramienta de simulación

PSPICE-FOR-TI — PSpice® para herramienta de diseño y simulación de TI

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Solicitar
Herramienta de simulación

TINA-TI — Programa de simulación analógica basado en SPICE

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
Guía del usuario: PDF
Ver opciones
Paquete Pasadores Descargar
SOIC (D) 16 Ver opciones
Se aplican los Términos y condiciones estándar de TI para los elementos de evaluación.

Pedidos y calidad

Información incluida:
  • RoHS
  • REACH
  • Marcado del dispositivo
  • Acabado de plomo/material de la bola
  • Clasificación de nivel de sensibilidad a la humedad (MSL) / reflujo máximo
  • Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
  • Contenido del material
  • Resumen de calificaciones
  • Monitoreo continuo de confiabilidad
Información incluida:
  • Lugar de fabricación
  • Lugar de ensamblaje

Los productos recomendados pueden tener parámetros, módulos de evaluación o diseños de referencia relacionados con este producto de TI.

Soporte y capacitación

Foros de TI E2E™ con asistencia técnica de los ingenieros de TI

Ver todos los temas del foro en inglés

El contenido lo proporcionan “tal como está” TI y los colaboradores de la comunidad y no constituye especificaciones de TI. Consulte los términos de uso.

Si tiene preguntas sobre la calidad, el paquete o el pedido de productos de TI, consulte el soporte de TI. ​​​​​​​​​​​​​​

Videos