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TPSI2072-Q1

ACTIVO

Interruptor aislado para automoción de 600 V, 50 mA, con valor nominal de avalancha de 2 mA

Detalles del producto

Withstand isolation voltage (VISO) (Vrms) 3750 FET Internal Number of channels 2 Supply voltage (min) (V) 4.5 Supply voltage (max) (V) 20 Imax (A) 0.05 Features 2-mA avalanche current, Capacitive isolation TI functional safety category Functional Safety-Capable Operating temperature range (°C) -40 to 125 Turnoff time (disable) (ns) 100000 OFF-state leakage current (µA) 1 Rating Automotive
Withstand isolation voltage (VISO) (Vrms) 3750 FET Internal Number of channels 2 Supply voltage (min) (V) 4.5 Supply voltage (max) (V) 20 Imax (A) 0.05 Features 2-mA avalanche current, Capacitive isolation TI functional safety category Functional Safety-Capable Operating temperature range (°C) -40 to 125 Turnoff time (disable) (ns) 100000 OFF-state leakage current (µA) 1 Rating Automotive
SOIC (DWQ) 11 106.09 mm² 10.3 x 10.3
  • Qualified for automotive applications
    • AEC-Q100 grade 1: –40 to 125°C T A
  • Integrated avalanche rated MOSFETs
    • Designed and qualified for reliability for dielectric withstand testing (Hi-Pot)
      • I AVA = 2-mA for 5-s pulses, 1-mA for 60-s pulses
      • V HIPOT, 5-s = 4300-V with R series > 1.83-MΩ
      • V HIPOT, 5-s = 2850-V with R series > 1.1-MΩ
    • 600-V standoff voltage
    • R ON = 65-Ω (T J = 25°C)
    • I OFF = 1-µA at 500-V (T J = 105°C)
  • Low primary side supply current
    • 5-mA single channel, 9-mA two channel ON state current
  • Functional Safety Capable
  • Robust isolation barrier:
    • > 26 year projected lifetime at 1000-V RMS / 1500-V DC working voltage
    • Isolation rating, V ISO, up to 3750-V RMS / 5300-V DC
  • SOIC 11-pin (DWQ) package with wide pins for improved thermal performance
    • Creepage and clearance ≥ 8-mm (primary-secondary)
    • Creepage and clearance ≥ 3-mm (across switch terminals)
  • Safety-related certifications
    • (Planned) DIN VDE V 0884-11:2017-01
    • (Planned) UL 1577 component recognition program
  • Qualified for automotive applications
    • AEC-Q100 grade 1: –40 to 125°C T A
  • Integrated avalanche rated MOSFETs
    • Designed and qualified for reliability for dielectric withstand testing (Hi-Pot)
      • I AVA = 2-mA for 5-s pulses, 1-mA for 60-s pulses
      • V HIPOT, 5-s = 4300-V with R series > 1.83-MΩ
      • V HIPOT, 5-s = 2850-V with R series > 1.1-MΩ
    • 600-V standoff voltage
    • R ON = 65-Ω (T J = 25°C)
    • I OFF = 1-µA at 500-V (T J = 105°C)
  • Low primary side supply current
    • 5-mA single channel, 9-mA two channel ON state current
  • Functional Safety Capable
  • Robust isolation barrier:
    • > 26 year projected lifetime at 1000-V RMS / 1500-V DC working voltage
    • Isolation rating, V ISO, up to 3750-V RMS / 5300-V DC
  • SOIC 11-pin (DWQ) package with wide pins for improved thermal performance
    • Creepage and clearance ≥ 8-mm (primary-secondary)
    • Creepage and clearance ≥ 3-mm (across switch terminals)
  • Safety-related certifications
    • (Planned) DIN VDE V 0884-11:2017-01
    • (Planned) UL 1577 component recognition program

The TPSI2072-Q1 is a two channel isolated solid state relay designed for high voltage automotive and industrial applications. The TPSI2072-Q1 uses TI’s high reliability capacitive isolation technology in combination with internal back-to-back MOSFETs to form a completely integrated solution requiring no secondary side power supply. The TPSI2072-Q1 improves system reliability as TI’s capacitive isolation technology does not suffer from mechanical wearout or photo degradation failure modes common in mechanical relay and photo relay components.

The primary side of the device is powered by only 9 mA of input current and incorporates fail-safe EN1 and EN2 pins preventing any possibility of back powering the VDD supply. In most applications, the VDD pin of the device should be connected to a system supply between 4.5 V–20 V and the EN1 and EN2 pins of the device should be driven by a GPIO output with logic HI between 2.1 V–20 V. In other applications, the VDD, EN1, and EN2 pins could be driven together directly from the system supply or from a GPIO output.

Each channel on the secondary side consists of back-to-back MOSFETs with a standoff voltage of +/-600 V from SM to S1 and SM to S2. The TPSI2072-Q1 MOSFET’s avalanche robustness and thermally conscious package design allow it to robustly support system level dielectric withstand testing (HiPot) and DC fast charger surge currents of up to 2 mA without requiring any external components.

The TPSI2072-Q1 is a two channel isolated solid state relay designed for high voltage automotive and industrial applications. The TPSI2072-Q1 uses TI’s high reliability capacitive isolation technology in combination with internal back-to-back MOSFETs to form a completely integrated solution requiring no secondary side power supply. The TPSI2072-Q1 improves system reliability as TI’s capacitive isolation technology does not suffer from mechanical wearout or photo degradation failure modes common in mechanical relay and photo relay components.

The primary side of the device is powered by only 9 mA of input current and incorporates fail-safe EN1 and EN2 pins preventing any possibility of back powering the VDD supply. In most applications, the VDD pin of the device should be connected to a system supply between 4.5 V–20 V and the EN1 and EN2 pins of the device should be driven by a GPIO output with logic HI between 2.1 V–20 V. In other applications, the VDD, EN1, and EN2 pins could be driven together directly from the system supply or from a GPIO output.

Each channel on the secondary side consists of back-to-back MOSFETs with a standoff voltage of +/-600 V from SM to S1 and SM to S2. The TPSI2072-Q1 MOSFET’s avalanche robustness and thermally conscious package design allow it to robustly support system level dielectric withstand testing (HiPot) and DC fast charger surge currents of up to 2 mA without requiring any external components.

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Documentación técnica

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* Data sheet TPSI2072-Q1 2-Channel 600-V, 50-mA, Automotive Isolated Switch with 2-mA Avalanche Rating for Insulation Monitoring and High Voltage Measurements datasheet PDF | HTML 30 jun 2023
Functional safety information TPSI2072-Q1 Functional Safety, FIT Rate, Failure Mode Distribution and Pin FMA 30 jun 2023
EVM User's guide TPSI2072-Q1 EVM User's Guide PDF | HTML 29 jun 2023
Certificate TPSI2072Q1EVM EU Declaration of Conformity (DoC) 27 jun 2023
Product overview When to use SSR or Isolated Gate Driver PDF | HTML 04 ago 2022

Diseño y desarrollo

Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.

Placa de evaluación

TPSI2072Q1EVM — Módulo de evaluación TPSI2072-Q1 para interruptor aislado de 600 V de 2 canales

El TPSI2072-Q1 es una placa de dos capas de cobre que contiene múltiples puntos de prueba y puentes para evaluar completamente la funcionalidad del dispositivo.
Guía del usuario: PDF | HTML
Herramienta de simulación

PSPICE-FOR-TI — PSpice® para herramienta de diseño y simulación de TI

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
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SOIC (DWQ) 11 Ver opciones

Pedidos y calidad

Información incluida:
  • RoHS
  • REACH
  • Marcado del dispositivo
  • Acabado de plomo/material de la bola
  • Clasificación de nivel de sensibilidad a la humedad (MSL) / reflujo máximo
  • Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
  • Contenido del material
  • Resumen de calificaciones
  • Monitoreo continuo de confiabilidad
Información incluida:
  • Lugar de fabricación
  • Lugar de ensamblaje

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