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Circuitos integrados HDMI, DisplayPort y MIPI

TVP70025I

ACTIVO

Digitalizador de video y gráficos triple de 10 bits y 90 MSPS con PLL horizontal

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TVP70025I

ACTIVO
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Detalles del producto

Type HDMI Companion Rating Catalog Operating temperature range (°C) -40 to 85
Type HDMI Companion Rating Catalog Operating temperature range (°C) -40 to 85
HTQFP (PZP) 100 256 mm² (16 mm × 16 mm)
  • Analog Channels
    • –6-dB to 6-dB Analog Gain
    • Analog Input Multiplexers (MUXs)
    • Automatic Video Clamp
    • Three Digitizing Channels, Each With Independently Controllable Clamp, Gain, Offset, and Analog-to-Digital Converter (ADC)
    • Clamping: Selectable Clamping Between Bottom Level and Mid Level
    • Offset: 1024-Step Programmable RGB or YPbPr Offset Control
    • Gain: 8-Bit Programmable Gain Control
    • ADC: 10-Bit 90-MSPS A/D Converter
    • Automatic Level Control (ALC) Circuit
    • Composite Sync: Integrated Sync-on-Green Extraction From Green/Luminance Channel
    • Support for DC- and AC-Coupled Input Signals
    • Programmable Video Bandwidth Control
    • Supports Component Video Standards 480i, 576i, 480p, 576p, 720p, and 1080i
    • Supports PC Graphics Inputs up to 90 MSPS
    • Programmable RGB-to-YCbCr Color Space Conversion
  • Horizontal Phase-Locked Loop (PLL)
    • Fully Integrated Horizontal PLL for Pixel Clock Generation
    • 9-MHz to 90-MHz Pixel Clock Generation From HSYNC Input
    • Adjustable Horizontal PLL Loop Bandwidth for Minimum Jitter
    • 5-Bit Programmable Subpixel Accurate Positioning of Sampling Phase
  • Output Formatter
    • Supports 20-bit 4:2:2 Outputs With Embedded Syncs
    • Support for RGB/YCbCr 4:4:4 and YCbCr 4:2:2 Output Modes to Reduce Board Traces
    • Dedicated DATACLK Output With Programmable Output Polarity for Easy Latching of Output Data
  • System
    • Industry-Standard Normal/Fast I2C Interface With Register Readback Capability
    • Space-Saving 100-Pin TQFP Package
    • Thermally-Enhanced PowerPAD Package for Better Heat Dissipation
    • Industrial Temperature Range –40°C to 85°C
  • Analog Channels
    • –6-dB to 6-dB Analog Gain
    • Analog Input Multiplexers (MUXs)
    • Automatic Video Clamp
    • Three Digitizing Channels, Each With Independently Controllable Clamp, Gain, Offset, and Analog-to-Digital Converter (ADC)
    • Clamping: Selectable Clamping Between Bottom Level and Mid Level
    • Offset: 1024-Step Programmable RGB or YPbPr Offset Control
    • Gain: 8-Bit Programmable Gain Control
    • ADC: 10-Bit 90-MSPS A/D Converter
    • Automatic Level Control (ALC) Circuit
    • Composite Sync: Integrated Sync-on-Green Extraction From Green/Luminance Channel
    • Support for DC- and AC-Coupled Input Signals
    • Programmable Video Bandwidth Control
    • Supports Component Video Standards 480i, 576i, 480p, 576p, 720p, and 1080i
    • Supports PC Graphics Inputs up to 90 MSPS
    • Programmable RGB-to-YCbCr Color Space Conversion
  • Horizontal Phase-Locked Loop (PLL)
    • Fully Integrated Horizontal PLL for Pixel Clock Generation
    • 9-MHz to 90-MHz Pixel Clock Generation From HSYNC Input
    • Adjustable Horizontal PLL Loop Bandwidth for Minimum Jitter
    • 5-Bit Programmable Subpixel Accurate Positioning of Sampling Phase
  • Output Formatter
    • Supports 20-bit 4:2:2 Outputs With Embedded Syncs
    • Support for RGB/YCbCr 4:4:4 and YCbCr 4:2:2 Output Modes to Reduce Board Traces
    • Dedicated DATACLK Output With Programmable Output Polarity for Easy Latching of Output Data
  • System
    • Industry-Standard Normal/Fast I2C Interface With Register Readback Capability
    • Space-Saving 100-Pin TQFP Package
    • Thermally-Enhanced PowerPAD Package for Better Heat Dissipation
    • Industrial Temperature Range –40°C to 85°C

The TVP70025I is a complete solution for digitizing video and graphic signals in RGB or YPbPr color spaces. The device supports pixel rates up to 90 MHz. Therefore, it can be used for PC graphics digitizing up to WXGA (1440 × 900) resolution at a 60-Hz screen refresh rate, and in video environments for the digitizing of digital TV formats, including HDTV up to 1080i.

The TVP70025I is powered from 3.3-V and 1.8-V supply and integrates a triple high-performance analog-to-digital (A/D) converter with clamping functions and variable gain, independently programmable for each channel. The clamp timing window is provided by an external pulse or can be generated internally. The TVP70025I includes analog slicing circuitry on the SOG inputs to support sync-on-luminance or sync-on-green extraction. In addition, TVP70025I can extract discrete HSYNC and VSYNC from composite sync using a sync slicer.

The TVP70025I also contains a complete horizontal phase-locked loop (PLL) block to generate a pixel clock from the HSYNC input. Pixel clock output frequencies range from 9 MHz to 90 MHz.

All programming of the device is done via an industry-standard I2C interface, which supports both reading and writing of register settings. The TVP70025I is available in a space-saving 100-pin TQFP PowerPAD package.

The TVP70025I is a complete solution for digitizing video and graphic signals in RGB or YPbPr color spaces. The device supports pixel rates up to 90 MHz. Therefore, it can be used for PC graphics digitizing up to WXGA (1440 × 900) resolution at a 60-Hz screen refresh rate, and in video environments for the digitizing of digital TV formats, including HDTV up to 1080i.

The TVP70025I is powered from 3.3-V and 1.8-V supply and integrates a triple high-performance analog-to-digital (A/D) converter with clamping functions and variable gain, independently programmable for each channel. The clamp timing window is provided by an external pulse or can be generated internally. The TVP70025I includes analog slicing circuitry on the SOG inputs to support sync-on-luminance or sync-on-green extraction. In addition, TVP70025I can extract discrete HSYNC and VSYNC from composite sync using a sync slicer.

The TVP70025I also contains a complete horizontal phase-locked loop (PLL) block to generate a pixel clock from the HSYNC input. Pixel clock output frequencies range from 9 MHz to 90 MHz.

All programming of the device is done via an industry-standard I2C interface, which supports both reading and writing of register settings. The TVP70025I is available in a space-saving 100-pin TQFP PowerPAD package.
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Este producto no cuenta con soporte de diseño continuo de TI para proyectos nuevos, como contenidos nuevos o actualizaciones de software. Si está disponible, encontrará material adicional, software y herramientas relevantes en la página del producto. También puede buscar información archivada en los foros de soporte de TI E2ETM.

Documentación técnica

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Documentación principal Tipo Título Opciones de formato Descargar la versión más reciente en inglés Fecha
* Hoja de datos TVP70025I Triple 10-Bit 90-MSPS Video and Graphics Digitizer With Horizontal PLL datasheet (Rev. C) 24/04/2013
Nota sobre la aplicación TVP7002 PCB Layout Guidelines 16/06/2010

Diseño y desarrollo

Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.

Herramienta de programación de software

SLEC025 — TVP70025I Setup Files

Productos y hardware compatibles
Soporte de software

SLEC029 — TVP7002 + THS8200 EVM Kit Setup

Productos y hardware compatibles
Herramienta de cálculo

SLEC027 — TVP7002, TVP70025i PLL Worksheet

Productos y hardware compatibles
Encapsulado Pines Símbolos CAD, huellas y modelos 3D
HTQFP (PZP) 100 Ultra Librarian
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Pedidos y calidad

Soporte y capacitación

Foros de TI E2E™ con asistencia técnica de los ingenieros de TI

Ver todos los temas del foro en inglés

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