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UCC27712

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Controlador de puerta de medio puente de 1.8 A/2.8 A y 620 V con bloqueo

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UCC27712

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Detalles del producto

Bootstrap supply voltage (max) (V) 700 Power switch IGBT, MOSFET Input supply voltage (min) (V) 10 Input supply voltage (max) (V) 20 Peak output current (A) 2.8 Operating temperature range (°C) -40 to 150 Undervoltage lockout (typ) (V) 10 Rating Catalog Propagation delay time (µs) 0.1 Rise time (ns) 16 Fall time (ns) 10 Iq (mA) 0.25 Input threshold CMOS, TTL Channel input logic Noninverting Switch node voltage (V) -11 Features Dead time control, Interlock Driver configuration CMOS compatible, Dual, Noninverting, TTL compatible
Bootstrap supply voltage (max) (V) 700 Power switch IGBT, MOSFET Input supply voltage (min) (V) 10 Input supply voltage (max) (V) 20 Peak output current (A) 2.8 Operating temperature range (°C) -40 to 150 Undervoltage lockout (typ) (V) 10 Rating Catalog Propagation delay time (µs) 0.1 Rise time (ns) 16 Fall time (ns) 10 Iq (mA) 0.25 Input threshold CMOS, TTL Channel input logic Noninverting Switch node voltage (V) -11 Features Dead time control, Interlock Driver configuration CMOS compatible, Dual, Noninverting, TTL compatible
SOIC (D) 8 29.4 mm² 4.9 x 6
  • High-side and low-side configuration
  • Dual inputs with output interlock and 150-ns deadtime
  • Fully operational up to 620-V, 700-V absolute maximum on HB pin
  • 10-V to 20-V VDD recommended range
  • Peak output current 2.8-A sink, 1.8-A source
  • dv/dt immunity of 50 V/ns
  • Logic operational up to –11 V on HS pin
  • Negative voltage tolerance on inputs of –5 V
  • Large negative transient safe operating area
  • UVLO protection for both channels
  • Small propagation delay (100-ns typical)
  • Delay matching (12-ns typical)
  • Floating channel designed for bootstrap operation
  • Low quiescent current
  • TTL and CMOS compatible inputs
  • Industry standard SOIC-8 package
  • All parameters specified over temperature range, –40 °C to +125 °C
  • High-side and low-side configuration
  • Dual inputs with output interlock and 150-ns deadtime
  • Fully operational up to 620-V, 700-V absolute maximum on HB pin
  • 10-V to 20-V VDD recommended range
  • Peak output current 2.8-A sink, 1.8-A source
  • dv/dt immunity of 50 V/ns
  • Logic operational up to –11 V on HS pin
  • Negative voltage tolerance on inputs of –5 V
  • Large negative transient safe operating area
  • UVLO protection for both channels
  • Small propagation delay (100-ns typical)
  • Delay matching (12-ns typical)
  • Floating channel designed for bootstrap operation
  • Low quiescent current
  • TTL and CMOS compatible inputs
  • Industry standard SOIC-8 package
  • All parameters specified over temperature range, –40 °C to +125 °C

The UCC27712 is a 620-V high-side and low-side gate driver with 1.8-A source, 2.8-A sink current, targeted to drive power MOSFETs or IGBTs.

The recommended VDD operating voltage is 10-V to 20-V for IGBT’s and 10-V to 17-V for power MOSFETs.

The UCC27712 includes protection features where the outputs are held low when the inputs are left open or when the minimum input pulse width specification is not met. Interlock and deadtime functions prevent both outputs from being turned on simultaneously. In addition, the device accepts a wide range bias supply range and offers UVLO protection for both the VDD and HB bias supply.

Developed with TI’s state of the art high-voltage device technology, the device features robust drive with excellent noise and transient immunity including large negative voltage tolerance on its inputs, high dV/dt tolerance, wide negative transient safe operating area (NTSOA) on the switch node (HS), and interlock.

The device consists of one ground-referenced channel (LO) and one floating channel (HO) which is designed for operating with bootstrap or isolated power supplies. The device features fast propagation delays and excellent delay matching between both channels. On the UCC27712, each channel is controlled by its respective input pins, HI and LI.

The UCC27712 is a 620-V high-side and low-side gate driver with 1.8-A source, 2.8-A sink current, targeted to drive power MOSFETs or IGBTs.

The recommended VDD operating voltage is 10-V to 20-V for IGBT’s and 10-V to 17-V for power MOSFETs.

The UCC27712 includes protection features where the outputs are held low when the inputs are left open or when the minimum input pulse width specification is not met. Interlock and deadtime functions prevent both outputs from being turned on simultaneously. In addition, the device accepts a wide range bias supply range and offers UVLO protection for both the VDD and HB bias supply.

Developed with TI’s state of the art high-voltage device technology, the device features robust drive with excellent noise and transient immunity including large negative voltage tolerance on its inputs, high dV/dt tolerance, wide negative transient safe operating area (NTSOA) on the switch node (HS), and interlock.

The device consists of one ground-referenced channel (LO) and one floating channel (HO) which is designed for operating with bootstrap or isolated power supplies. The device features fast propagation delays and excellent delay matching between both channels. On the UCC27712, each channel is controlled by its respective input pins, HI and LI.
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Documentación técnica

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* Data sheet UCC27712 620-V, 1.8-A, 2.8-A High-Side Low-Side Gate Driver with Interlock datasheet (Rev. B) PDF | HTML 05 mar 2020
Application note Selecting Gate Drivers for HVAC Systems (Rev. A) PDF | HTML 07 nov 2025
Application note Using Half-Bridge Gate Driver to Achieve 100% Duty Cycle for High Side FET PDF | HTML 25 mar 2024
Application note Review of Different Power Factor Correction (PFC) Topologies' Gate Driver Needs PDF | HTML 22 ene 2024
Technical article Selecting the right level of integration to meet motor design requirements PDF | HTML 04 ene 2024
Application note Bootstrap Circuitry Selection for Half Bridge Configurations (Rev. A) PDF | HTML 08 sep 2023
Application note Comparative Analysis of Two Different Methods for Gate-Drive Current Boosting (Rev. A) PDF | HTML 17 feb 2022
Application note Voltage Fed Full Bridge DC-DC & DC-AC Converter High-Freq Inverter Using C2000 (Rev. D) 07 abr 2021
Application note Implementing High-Side Switches Using Half-Bridge Gate Drivers for 48-V Battery. 12 may 2020
Application brief External Gate Resistor Selection Guide (Rev. A) 28 feb 2020
Application brief Understanding Peak IOH and IOL Currents (Rev. A) 28 feb 2020
More literature Fundamentals of MOSFET and IGBT Gate Driver Circuits (Replaces SLUP169) (Rev. A) 29 oct 2018
Technical article How to achieve higher system robustness in DC drives, part 3: minimum input pulse PDF | HTML 19 sep 2018
Technical article How to achieve higher system robustness in DC drives, part 2: interlock and deadti PDF | HTML 30 may 2018
Technical article How to achieve higher system robustness in DC drives, part 1: negative voltage PDF | HTML 17 abr 2018

Diseño y desarrollo

Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.

Placa de evaluación

UCC27712EVM-287 — Módulo de evaluación UCC27712 de controlador de puerta de lado bajo y lado alto de 620 V y 1.8 A/2.8

El UCC27712EVM-287 está diseñado para evaluar el UCC27712D, que es un controlador de puerta de medio puente de 620 V con alta capacidad de corriente máxima de fuente y disipador. Este EVM podría utilizarse para evaluar el IC del controlador según su ficha técnica. El EVM también se puede utilizar (...)
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Modelo de simulación

UCC27712 PSpice Transient Model

SLUM579.ZIP (68 KB) - PSpice Model
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Modelo de simulación

UCC27712 TINA-TI Transient Reference Design

SLUM599.TSC (1513 KB) - TINA-TI Reference Design
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Modelo de simulación

UCC27712 TINA-TI Transient Spice Model

SLUM600.ZIP (23 KB) - TINA-TI Spice Model
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Modelo de simulación

UCC27712 Unencrypted PSpice Transient Model

SLUM637.ZIP (3 KB) - PSpice Model
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Esquema

UCC2771x Schematic Review Template

SLURB13.ZIP (63 KB)
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Herramienta de simulación

PSPICE-FOR-TI — PSpice® para herramienta de diseño y simulación de TI

PSpice® para TI es un entorno de diseño y simulación que ayuda a evaluar la funcionalidad de los circuitos analógicos. Esta completa suite de diseño y simulación utiliza un motor de análisis analógico de Cadence®. Disponible sin ningún costo, PSpice para TI incluye una de las bibliotecas de modelos (...)
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Pedidos y calidad

Información incluida:
  • RoHS
  • REACH
  • Marcado del dispositivo
  • Acabado de plomo/material de la bola
  • Clasificación de nivel de sensibilidad a la humedad (MSL) / reflujo máximo
  • Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
  • Contenido del material
  • Resumen de calificaciones
  • Monitoreo continuo de confiabilidad
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  • Lugar de fabricación
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