DS90UB925Q-Q1
- Bidirectional Control Interface Channel Interface with
I2C Compatible Serial Control Bus - Supports High Definition (720 p) Digital Video Format
- RGB888 + VS, HS, DE and I2S Audio Supported
- Supports Two 10–bit Camera Video Streams
- 5 – 85MHz PCLK Supported
- Single 3.3 V Operation with 1.8 V or 3.3 V Compatible
LVCMOS I/O Interface - AC-Coupled STP Interconnect Up to 10 Meters
- Parallel LVCMOS Video Inputs
- DC-Balanced and Scrambled Data with Embedded Clock
- Supports Repeater Application
- Internal Pattern Generation
- Low Power Modes Minimize Power Dissipation
- Automotive Grade Product: AEC-Q100 Grade 2 Qualified
- >8kV HBM and ISO 10605 ESD Rating
- Backward Compatible to FPD-Link II
The DS90UB925Q-Q1 serializer, in conjunction with the DS90UB926Q-Q1 deserializer, provides a complete digital interface for concurrent transmission of high-speed video, audio, and control data for automotive display and image sensing applications.
The chipset is ideally suited for automotive video-display systems with HD formats and automotive vision systems with megapixel resolutions. The DS90UB925Q-Q1 incorporates an embedded bidirectional control channel and low latency GPIO controls. This chipset translates a parallel interface into a single pair high-speed serialized interface. The serial bus scheme, FPD-Link III, supports full duplex of high-speed video data transmission and bidirectional control communication over a single differential link. Consolidation of video data and control over a single differential pair reduces the interconnect size and weight, while also eliminating skew issues and simplifying system design.
The DS90UB925Q-Q1 serializer embeds the clock, DC scrambles & balances the data payload, and level shifts the signals to high-speed low voltage differential signaling. Up to 24 data bits are serialized along the video control signals.
Serial transmission is optimized by a user selectable de-emphasis. EMI is minimized by the use of low voltage differential signaling, data scrambling and randomization and spread spectrum clocking compatibility.
技術資料
| 上位の文書 | タイプ | タイトル | フォーマットオプション | 最新の英語版をダウンロード | 日付 | |
|---|---|---|---|---|---|---|
| * | データシート | DS90UB925Q-Q1 5 to 85 MHz 24-Bit Color FPD-Link III Serializer With Bidirectional Control Channel データシート (Rev. D) | PDF | HTML | 2014/10/23 | ||
| アプリケーション・ノート | Enabling GPIOs in DS90UB925 and DS90UB926 | 2015/11/10 | ||||
| アプリケーション・ノート | Using the I2S Audio Interface of DS90Ux92x FPD-Link III Devices | 2013/05/04 | ||||
| アプリケーション・ノート | I2C Communication Over FPD-Link III with Bidirectional Control Channel (Rev. A) | 2013/04/26 | ||||
| ユーザー・ガイド | DS90UB925QSEVB User's Guide | 2012/09/20 |
設計と開発
その他のアイテムや必要なリソースを参照するには、以下のタイトルをクリックして詳細ページをご覧ください。
DS90UB926QSEVB — DS90UB926Q 評価モジュール
The DS90UB926QSEVB is an evaluation board designed to demonstrate the performance and unique features of the DS90UB926Q FPD-Link III deserializer.
The DS90UB926QSEVB board is designed to accept any of TI’s compatible FPD-Link III serializer devices. The FPD-Link III serial input interface is (...)
DS90UB928QEVM — DS90UB928QEVM FPD-Link III Deserializer Evaluation Module
DS90UH928QEVM — DS90UH928QEVM FPD-Link III Deserializer Evaluation Module
The Texas Instruments DS90UH928QEVM evaluation module (EVM) helps system designers evaluate the operation and performance of the DS90UH928Q 5MHz-85MHz FPD-Link III Deserializer (DES). The device translates a high-speed serialized FPD-Link III interface transported over a single shielded twisted (...)
ALP — Analog LaunchPad Framework Utility
ALP-PROFILE-UPDATE — Analog LaunchPad Profile Update Software
| パッケージ | ピン数 | CAD シンボル、フットプリント、および 3D モデル |
|---|---|---|
| WQFN (RHS) | 48 | Ultra Librarian |
購入と品質
推奨製品には、この TI 製品に関連するパラメータ、評価基板、またはリファレンス デザインが存在する可能性があります。