ホーム インターフェイス LVDS、M-LVDS、PECL の各 IC
ホーム
インターフェイス
LVDS、M-LVDS、PECL の各 IC

SN65LVDS105

アクティブ

1 個の LVTTL 入力、4 個の LVDS 出力、クロック ファンアウト バッファ

ご注文はこちら
データシート

SN65LVDS105

アクティブ
データシート ご注文はこちら

製品詳細

Function Driver, Repeater Protocols LVDS Number of transmitters 4 Number of receivers 1 Signaling rate (Mbps) 400 Input signal LVTTL Output signal LVDS Rating Catalog Operating temperature range (°C) -40 to 85
Function Driver, Repeater Protocols LVDS Number of transmitters 4 Number of receivers 1 Signaling rate (Mbps) 400 Input signal LVTTL Output signal LVDS Rating Catalog Operating temperature range (°C) -40 to 85
SOIC (D) 16 59.4 mm² (9.9 mm × 6 mm) TSSOP (PW) 16 32 mm² (5 mm × 6.4 mm)
  • Receiver and Drivers Meet or Exceed the
    Requirements of ANSI EIA/TIA-644 Standard
    • SN65LVDS105 Receives Low-Voltage TTL
      (LVTTL) Levels
    • SN65LVDS104 Receives Differential Input
      Levels, ±100 mV
  • Typical Data Signaling Rates to 400 Mbps or
    Clock Frequencies to 400 MHz
  • Operates From a Single 3.3-V Supply
  • Low-Voltage Differential Signaling With Typical
    Output Voltage of 350 mV and a 100-Ω Load
  • Propagation Delay Time
    • SN65LVDS105 – 2.2 ns (Typ)
    • SN65LVDS104 – 3.1 ns (Typ)
  • LVTTL Levels Are 5-V Tolerant
  • Electrically Compatible With LVDS, PECL,
    LVPECL, LVTTL, LVCMOS, GTL, BTL, CTT,
    SSTL, or HSTL Outputs With External Networks
  • Driver Outputs Are High-Impedance When
    Disabled or With VCC <1.5 V
  • Bus-Pin ESD Protection Exceeds 16 kV
  • SOIC and TSSOP Packaging
  • Receiver and Drivers Meet or Exceed the
    Requirements of ANSI EIA/TIA-644 Standard
    • SN65LVDS105 Receives Low-Voltage TTL
      (LVTTL) Levels
    • SN65LVDS104 Receives Differential Input
      Levels, ±100 mV
  • Typical Data Signaling Rates to 400 Mbps or
    Clock Frequencies to 400 MHz
  • Operates From a Single 3.3-V Supply
  • Low-Voltage Differential Signaling With Typical
    Output Voltage of 350 mV and a 100-Ω Load
  • Propagation Delay Time
    • SN65LVDS105 – 2.2 ns (Typ)
    • SN65LVDS104 – 3.1 ns (Typ)
  • LVTTL Levels Are 5-V Tolerant
  • Electrically Compatible With LVDS, PECL,
    LVPECL, LVTTL, LVCMOS, GTL, BTL, CTT,
    SSTL, or HSTL Outputs With External Networks
  • Driver Outputs Are High-Impedance When
    Disabled or With VCC <1.5 V
  • Bus-Pin ESD Protection Exceeds 16 kV
  • SOIC and TSSOP Packaging

The SN65LVDS10x are a differential line receiver and a LVTTL input (respectively) connected to four differential line drivers that implement the electrical characteristics of low-voltage differential signaling (LVDS). LVDS, as specified in EIA/TIA-644 is a data signaling technique that offers low-power, low-noise coupling, and switching speeds to transmit data at relatively long distances. (Note: The ultimate rate and distance of data transfer is dependent upon the attenuation characteristics of the media, the noise coupling to the environment, and other system characteristics.)

The intended application of this device and signaling technique is for point-to-point baseband data transmission over controlled impedance media of approximately 100 Ω. The transmission media may be printed-circuit board traces, backplanes, or cables. Having the drivers integrated into the same substrate, along with the low pulse skew of balanced signaling, allows extremely precise timing alignment of the signals repeated from the input. This is particularly advantageous in distribution or expansion of signals such as clock or serial data stream.

The SN65LVDS10x are characterized for operation from –40°C to 85°C.

The SN65LVDS10x are members of a family of LVDS repeaters. A brief overview of the family is provided in the Selection Guide to LVDS Repeaters section.

The SN65LVDS10x are a differential line receiver and a LVTTL input (respectively) connected to four differential line drivers that implement the electrical characteristics of low-voltage differential signaling (LVDS). LVDS, as specified in EIA/TIA-644 is a data signaling technique that offers low-power, low-noise coupling, and switching speeds to transmit data at relatively long distances. (Note: The ultimate rate and distance of data transfer is dependent upon the attenuation characteristics of the media, the noise coupling to the environment, and other system characteristics.)

The intended application of this device and signaling technique is for point-to-point baseband data transmission over controlled impedance media of approximately 100 Ω. The transmission media may be printed-circuit board traces, backplanes, or cables. Having the drivers integrated into the same substrate, along with the low pulse skew of balanced signaling, allows extremely precise timing alignment of the signals repeated from the input. This is particularly advantageous in distribution or expansion of signals such as clock or serial data stream.

The SN65LVDS10x are characterized for operation from –40°C to 85°C.

The SN65LVDS10x are members of a family of LVDS repeaters. A brief overview of the family is provided in the Selection Guide to LVDS Repeaters section.
filter その他の LVDS、M-LVDS、PECL の各 IC を検索
ダウンロード 字幕付きのビデオを表示 ビデオ

お客様が関心を持ちそうな類似品

open-in-new 代替品と比較
比較対象デバイスと類似の機能。
SN65LVDS104 アクティブ 1:4 LVDS クロック ファンアウト バッファ Receiver variant

技術資料

結果が見つかりませんでした。検索条件をクリアしてから、再度検索を試してください。
1 をすべて表示
上位の文書 タイプ タイトル フォーマットオプション 最新の英語版をダウンロード 日付
* データシート SN65LVDS10x 4-Port LVDS and 4-Port TTL-to-LVDS Repeaters データシート (Rev. G) PDF | HTML 2015/12/31

設計と開発

その他のアイテムや必要なリソースを参照するには、以下のタイトルをクリックして詳細ページをご覧ください。

シミュレーション・モデル

SN65LVDS105 IBIS Model Version 3.1 (Rev. B)

SLLC094 (32 KB) - IBIS モデル
サポート対象の製品とハードウェア
パッケージ ピン数 CAD シンボル、フットプリント、および 3D モデル
SOIC (D) 16 Ultra Librarian
TSSOP (PW) 16 Ultra Librarian
TI の評価基板に関する標準契約約款が適用されます。

購入と品質

推奨製品には、この TI 製品に関連するパラメータ、評価基板、またはリファレンス デザインが存在する可能性があります。

サポートとトレーニング

TI E2E™ フォーラムでは、TI のエンジニアからの技術サポートを提供

投稿されたすべてのフォーラムトピック (英語) を表示

コンテンツは、TI 投稿者やコミュニティ投稿者によって「現状のまま」提供されるもので、TI による仕様の追加を意図するものではありません。使用条件をご確認ください。

TI 製品の品質、パッケージ、ご注文に関するお問い合わせは、TI サポートをご覧ください。​​​​​​​​​​​​​​

ビデオ