AM62D-Q1
Processor Cores:
- Up to Quad Arm
Cortex-A53 microprocessor subsystem at up to 1.4GHz
- Quad-core Cortex-A53 cluster with 512KB L2 shared cache with SECDED ECC
- Each A53 core has 32KB L1 DCache with SECDED ECC and 32KB L1 ICache with Parity protection
- Single-core Arm
Cortex-R5F at up to 800MHz, integrated as part of MCU Channel with FFI
- 32KB ICache, 32KB L1 DCache, and 64KB TCM with SECDED ECC on all memories
- 512KB SRAM with SECDED ECC
- Single-core Arm
Cortex-R5F at up to 800MHz, integrated to support Device Management
- 32KB ICache, 32KB L1 DCache, and 64KB TCM with SECDED ECC on all memories
- DSP with Matrix Multiplication
Accelerator based on single-core C7x
- C7x floating point, up to 40GFLOPS, 256-bit Vector DSP at 1.0GHz
- Matrix Multiply Accelerator (MMA), up to 2TOPS (8b) at 1.0GHz
- 64KB L1 DCache with SECDED ECC and 32KB L1 ICache with Parity protection
- 1.25MB of L2 SRAM with SECDED ECC
Memory Subsystem:
- Up to 2.29MB of On-chip RAM
- 64KB of On-Chip RAM (OCRAM) with SECDED ECC, can be divided into smaller banks in increments of 32KB for as many as 2 separate memory banks
- 256KB of On-Chip RAM with SECDED ECC in SMS Subsystem
- 176KB of On-Chip RAM with SECDED ECC in SMS Subsystem for TI security firmware
- 512KB of On-chip RAM with SECDED ECC in Cortex-R5F MCU Subsystem
- 64KB of On-chip RAM with SECDED ECC in Device/Power Manager Subsystem
- 1.25MB of L2 SRAM with SECDED ECC in C7xDSP with Matrix Multiplication Accelerator
- DDR Subsystem (DDRSS)
- Supports LPDDR4
- 32-bit data bus with inline ECC
- Supports speeds up to 3733MT/s
- Max addressable range of 8GBytes
Functional Safety:
-
Functional Safety-Compliant targeted [Automotive]
- Developed for functional safety applications
- Documentation will be available to aid ISO 26262 functional safety system design
- Systematic capability up to ASIL D targeted
- Hardware integrity up to ASIL B targeted
- Safety-related certification
- ISO 26262 certification by TÜV SÜD planned
- AEC - Q100 qualified [Automotive]
Security:
- Secure boot supported
- Hardware-enforced Root-of-Trust (RoT)
- Support to switch RoT via backup key
- Support for takeover protection, IP protection, and anti-roll back protection
- Trusted Execution Environment (TEE)
supported
- Arm TrustZone based TEE
- Extensive firewall support for isolation
- Secure watchdog/timer/IPC
- Secure storage support
- Replay Protected Memory Block (RPMB) support
- Dedicated Security Controller with user programmable HSM core and dedicated security DMA & IPC subsystem for isolated processing
- Cryptographic acceleration supported
- Session-aware cryptographic engine
with ability to auto-switch key-material based on incoming data stream
- Supports cryptographic cores
- AES – 128-/192-/256-Bit key sizes
- SHA2 – 224-/256-/384-/512-Bit key sizes
- DRBG with true random number generator
- PKA (Public Key Accelerator) to Assist in RSA/ECC processing for secure boot
- Session-aware cryptographic engine
with ability to auto-switch key-material based on incoming data stream
- Debugging security
- Secure software controlled debug access
- Security aware debugging
High-Speed Interfaces:
- Integrated Ethernet switch supporting
(total 2 external ports)
- RMII(10/100) or RGMII (10/100/1000)
- IEEE1588 (Annex D, Annex E, Annex F with 802.1AS PTP)
- Clause 45 MDIO PHY management
- Packet Classifier based on ALE engine with 512 classifiers
- Priority based flow control
- Time Sensitive Networking (TSN) support
- Four CPU H/W interrupt Pacing
- IP/UDP/TCP checksum offload in hardware
- Two USB2.0 Ports
- Port configurable as USB host, USB peripheral, or USB Dual-Role Device (DRD mode)
- Integrated USB VBUS detection
- One Camera Serial interface (CSI-2)
Receiver with 4-Lane D-PHY
- High Speed External Processor Data Receive Interface over CSI-2 and MIPI D-PHY
General Connectivity:
- 9x Universal Asynchronous Receiver-Transmitters (UART)
- 5x Serial Peripheral Interface (SPI) controllers
- 6x Inter-Integrated Circuit (I2C) ports
- 3x Multichannel Audio Serial Ports
(McASP)
- Transmit and Receive Clocks up to 50MHz
- Up to 4/6/16 Serial Data Pins across 3x McASP with Independent TX and RX Clocks
- Supports Time Division Multiplexing (TDM), Inter-IC Sound (I2S), and Similar Formats
- Supports Digital Audio Interface Transmission (SPDIF, IEC60958-1, and AES-3 Formats)
- FIFO Buffers for Transmit and Receive (256 Bytes)
- Support for audio reference output clock
- 3x enhanced PWM modules (ePWM)
- 3x enhanced Quadrature Encoder Pulse modules (eQEP)
- 3x enhanced Capture modules (eCAP)
- General-Purpose I/O (GPIO), All LVCMOS I/O can be configured as GPIO
- 3x Controller Area Network (CAN) modules
with CAN-FD support
- Conforms w/ CAN Protocol 2.0 A, B and ISO 11898-1
- Full CAN-FD support (up to 64-data bytes)
- Parity/ECC check for Message RAM
- Speed up to 8Mbps
Media and Data Storage:
- 3x Multi-Media Card/Secure Digital (MMC/SD/SDIO) interface
- 1x 8-bit eMMC interface up to HS200 speed
- 2x 4-bit SD/SDIO interface up to UHS-I
- Compliant with eMMC 5.1, SD 3.0, and SDIO Version 3.0
- 1× General-Purpose Memory Controller
(GPMC) up to 133MHz
- Flexible 8- and 16-bit Asynchronous Memory Interface with up to four Chip (22-bit address) Selects (NAND, NOR, Muxed-NOR, and SRAM)
- Uses BCH code to support 4-, 8-, or 16-bit ECC
- Uses Hamming code to support 1-bit ECC
- Error Locator Module (ELM)
- Used with the GPMC to locate addresses of data errors from syndrome polynomials generated using a BCH algorithm
- Supports 4-, 8-, and 16-bit per 512-Byte block error location based on BCH algorithms
- OSPI/QSPI with DDR / SDR support
- Support for Serial NAND and Serial NOR Flash devices
- 4GBytes memory address support
- XIP mode with optional on-the-fly encryption
Power Management:
- Low-power modes supported by Device/Power
Manager
- Partial IO support for CAN/GPIO/UART wakeup
Boot Options:
- UART
- I2C EEPROM
- OSPI/QSPI Flash
- GPMC NOR/NAND Flash
- Serial NAND Flash
- SD Card
- eMMC
- USB (host) Mass Storage device
- USB (slave) boot from external host (DFU mode)
- Ethernet
Technology / Package:
- 16-nm FinFET technology
- 18mm x 18mm, 0.8mm pitch full-array, 484-pin FCCSP (ANF)
The AM62D processor from the Sitara™ MPU family is targeted for applications needing high-performance Digital Signal Processing. Some of these applications include:
- Audio: Automotive premium amplifier and professional audio
- Radar and Radio: Aerospace and Defense
- Sonar: Marine equipments
- Ultrasound: Medical equipments
- Instrumentation: Current, Voltage, other signals: Test and Measurement
Key cores on the device include the Arm® Cortex®-A53 and C7000™ (“C7x”) scalar and vector DSP core from Texas Instruments, a dedicated Matrix Multiplication Accelerator (MMA), along with an isolated MCU island. All protected by industrial and automotive grade safety and security hardware accelerators.
DSP Core Overview: the C7504 core from C7x family provides up to 40GFLOPS of DSP compute. It achieves 4x to 8x or more performance compared to the previous generation C66x DSP core. Some of the key features includes:
- 256-bit fixed- and floating-point DSP vector core
- Single-cycle latency to access L2 memory via Streaming Engine
- Improved control code efficiency
- True 64-bit machine with 64-bit memory addressing and single-cycle 64-bit base arithmetic operations
Integration Overview: along with C7x DSP core, the AM62D SoC integrates up to Quad Arm® Cortex®-A53 providing additional 16.8KDMIPS compute and HLOS flexibility of Linux or Real-Time Operating System (RTOS). Up to two Arm® Cortex®-R5F subsystems enable low-level, timing critical processing tasks to leave the Arm® Cortex®-A53 and DSP core’s unencumbered for applications. Integrated diagnostics and safety features support operations up to SIL-2 and ASIL-B levels while the integrated security features protect data against modern day attacks. The AM62D device also offers a 3-port Gigabit Ethernet switch with Time-Sensitive Networking (TSN) to enable audio networking features such as, Ethernet Audio Video Bridging (eAVB) and Dante, while peripherals like the McASP, enable multi-channel I2S and TDM Audio inputs and outputs.
기술 자료
설계 및 개발
전원 공급 솔루션
AM62D-Q1에 사용 가능한 전원 공급 솔루션을 찾아보세요. TI는 칩(SoC), 프로세서, 마이크로컨트롤러, 센서 또는 FPGA(Field Programmable Gate Array)의 TI와 비TI 시스템을 위한 전원 공급 솔루션을 제공합니다.
AUDIO-AM62D-EVM — 프리미엄 오디오를 위한 AM62D 확장 가능한 하드웨어
오디오-AM62D-EVM 평가 모듈(EVM)은 개발자가 다양한 사용 사례에 걸쳐 멀티 채널 오디오 애플리케이션의 프로토타입을 제작하고 평가할 수 있도록 설계된 저렴한 확장 가능한 플랫폼입니다. 오디오-AM62D-EVM의 핵심은 MMA(Matrix Multiplication Accelerator)와 긴밀하게 결합된 C7x DSP 256비트 폭 벡터 코어가 있고, 단일 사이클 액세스 가능 1.25MB L2 메모리, 쿼드 코어 Arm®-Cortex® A53 마이크로프로세서, 듀얼 코어 Arm Cortex-R5F MCU 및 LPDDR4 (...)
DP83867-EVM-AM — 산업용 이더넷 PHY 애드온 보드용 AM2x 및 AM6x 평가 모듈
DP83867-EVM-AM은 Arm 기반 고성능 마이크로컨트롤러 평가 모듈과 함께 사용되는 산업용 이더넷 PHY 애드온 보드입니다. 이 애드온 보드는 EVM을 사용한 초기 이더넷 평가 및 프로토타이핑에 탁월한 선택입니다. DP83867-EVM-AM에는 RGMII 인터페이스 및 표준 RJ45 이더넷 네트워킹 커넥터와 함께 TI DP83867IR 저지연 10/100/1000Mbps PHY가 장착되어 있습니다. DP83867-EVM-AM은 AUDIO-AM275-EVM과 같은 이더넷 확장 커넥터가 있는 EVM에서 지원됩니다.
TAS67CD-AEC — TAS67CD-AEC 클래스 D 증폭기 오디오 확장 카드
LB-3P-TRACE32-ARM — Arm® 기반 마이크로컨트롤러 및 프로세서용 Lauterbach TRACE32® 디버그 및 트레이스 시스템
Lauterbach의 TRACE32® 툴은 개발자가 모든 종류의 Arm® 기반 마이크로컨트롤러 및 프로세서를 분석, 최적화 및 인증할 수 있도록 하는 첨단 하드웨어 및 소프트웨어 구성 요소 제품군입니다. 세계적으로 유명한 임베디드 시스템 및 SoC용 디버그 및 트레이스 솔루션은 초기 사전 실리콘 개발부터 현장의 제품 인증 및 문제 해결에 이르기까지 모든 개발 단계를 위한 완벽한 솔루션입니다. Lauterbach 툴의 직관적인 모듈형 설계는 엔지니어에게 현존하는 최고의 성능을 제공하고 요구 사항 변화에 따라 적응하고 성장하는 (...)
TSK-3P-BLUEBOX — TASKING BlueBox hardware debugger
TASKING’s Debug, Trace, and Test tools offer comprehensive solutions for efficient debugging, tracing, and testing of TI's embedded systems. The scalable TASKING BlueBox debuggers allow users to easily flash, debug, and test across TI's portfolio. Development on TI hardware is made even easier with (...)
CCSTUDIO — Code Composer Studio integrated development environment (IDE)
CCStudio™ IDE is part of TI's extensive CCStudio™ development ecosystem and is an integrated development environment for TI's microcontrollers, processors, wireless connectivity devices, and radar sensors. CCStudio IDE is available as desktop or cloud-based applications. The cloud version (...)
K3-RESOURCE-CONFIGURATION — Resource partitioning tool for multi core SOCs
SYSCONFIG — Standalone desktop version of SysConfig
CCStudio™ SysConfig is part of TI's extensive CCStudio™ development ecosystem and is a configuration tool that simplifies hardware and software configuration challenges to accelerate software development.
SysConfig provides an intuitive graphical user interface for configuring pins, peripherals, (...)
TSK-3P-VX-TOOLSET — Arm용 TASKING VX-toolset
Arm용 VX-Toolset은 일부 Cortex-M 및 Cortex-R 코어 장치의 안전 필수 임베디드 소프트웨어 개발을 위해 인증된 컴파일러 툴체인입니다. Eclipse IDE 통합, 고급 멀티코어 지원, TASKING BlueBox 디버거와의 호환성을 제공하는 VX-toolset은 개발을 단순화합니다. 최대 ASIL D까지의 ISO 26262 및 ISO 21434 규격 준수를 위해 TÜV NORD 인증을 획득했습니다.
TI-DEVELOPER-ZONE — Start embedded development on your desktop or in the cloud
GHS-INTEGRITY-RTOS — Green Hills INTEGRITY RTOS
GHS-3P-UVELOSITY — Green Hills Software u-velOSity Safety RTOS
The µ-velOSity™ Safety RTOS is the smallest of Green Hills Software's real-time operating systems and was designed especially for microcontrollers. It supports a wide range of TI processor families using the Arm® Cortex-M or Cortex-R cores as a main CPU or as a co-processors (...)
WHIS-3P-SAFERTOS — WITTENSTEIN SAFERTOS 사전 인증 안전 RTOS
SAFERTOS®는 임베디드 프로세서를 위해 설계된 고유한 실시간 운영 체제입니다. TÜV SÜD의 IEC 61508 SIL3 및 ISO 26262 ASILD 표준에 따라 사전 인증을 받았습니다. SAFERTOS®는 WHIS 전문가 팀에서 안전을 위해 특별히 제작되었으며, 전 세계적으로 안전이 중요한 응용 분야에 사용됩니다. WHIS와 텍사스 인스트루먼트는 10년 넘게 협력해 왔습니다. 이 기간 동안, WHIS는 SAFERTOS®를 광범위한 TI 프로세서로 이식하여 널리 사용되는 모든 코어를 지원하며 요청 시 추가 아키텍처를 (...)
AM62D-PET-CALC — AM62D Power Estimation Tool
| 패키지 | 핀 | CAD 기호, 풋프린트 및 3D 모델 |
|---|---|---|
| FCCSP (ANF) | 484 | Ultra Librarian |
주문 및 품질
권장 제품에는 본 TI 제품과 관련된 매개 변수, 평가 모듈 또는 레퍼런스 디자인이 있을 수 있습니다.