패키징 정보
| 패키지 | 핀 PLCC (FN) | 28 |
| 작동 온도 범위(°C) -40 to 85 |
| 패키지 수량 | 캐리어 37 | TUBE |
CDCVF111의 주요 특징
- Low-Output Skew for Clock-Distribution Applications
- Differential Low-Voltage Pseudo-ECL (LVPECL) Compatible Inputs and Outputs
- Distributes Differential Clock Inputs to Nine Differential Clock Outputs
- Output Reference Voltage (VREF) Allows Distribution From a Single-Ended Clock Input
- Packaged In a 28-Pin Plastic Chip Carrier
CDCVF111에 대한 설명
The differential LVPECL clock-driver circuit distributes one pair of differential LVPECL clock inputs (CLKIN, CLKIN)\ to nine pairs of differential clock (Y, Y)\ outputs with minimum skew for clock distribution. It is specifically designed for driving 50-
transmission lines.
The VREF output can be strapped to the CLKIN\ input for a single-ended CLKIN input.
The CDCVF111 is characterized for operation from –40°C to 85°C.