홈 클록 및 타이밍 클록 버퍼
홈
클록 및 타이밍
클록 버퍼

CDCVF111

마지막 구매

1:9 차동 LVPECL 클록 드라이버

지금 주문
데이터 시트

CDCVF111

마지막 구매
데이터 시트 지금 주문

제품 상세 정보

Function Differential Output frequency (max) (MHz) 650 Number of outputs 9 Output supply voltage (V) 3.3 Core supply voltage (V) 3.3 Output skew (ps) 50 Features 1:9 fanout Operating temperature range (°C) -40 to 85 Rating Catalog Output type LVPECL Input type LVPECL
Function Differential Output frequency (max) (MHz) 650 Number of outputs 9 Output supply voltage (V) 3.3 Core supply voltage (V) 3.3 Output skew (ps) 50 Features 1:9 fanout Operating temperature range (°C) -40 to 85 Rating Catalog Output type LVPECL Input type LVPECL
PLCC (FN) 28 155.0025 mm² 12.45 x 12.45
  • Low-Output Skew for Clock-Distribution Applications
  • Differential Low-Voltage Pseudo-ECL (LVPECL) Compatible Inputs and Outputs
  • Distributes Differential Clock Inputs to Nine Differential Clock Outputs
  • Output Reference Voltage (VREF) Allows Distribution From a Single-Ended Clock Input
  • Packaged In a 28-Pin Plastic Chip Carrier
  • Low-Output Skew for Clock-Distribution Applications
  • Differential Low-Voltage Pseudo-ECL (LVPECL) Compatible Inputs and Outputs
  • Distributes Differential Clock Inputs to Nine Differential Clock Outputs
  • Output Reference Voltage (VREF) Allows Distribution From a Single-Ended Clock Input
  • Packaged In a 28-Pin Plastic Chip Carrier

The differential LVPECL clock-driver circuit distributes one pair of differential LVPECL clock inputs (CLKIN, CLKIN)\ to nine pairs of differential clock (Y, Y)\ outputs with minimum skew for clock distribution. It is specifically designed for driving 50- transmission lines.

The VREF output can be strapped to the CLKIN\ input for a single-ended CLKIN input.

The CDCVF111 is characterized for operation from –40°C to 85°C.

The differential LVPECL clock-driver circuit distributes one pair of differential LVPECL clock inputs (CLKIN, CLKIN)\ to nine pairs of differential clock (Y, Y)\ outputs with minimum skew for clock distribution. It is specifically designed for driving 50- transmission lines.

The VREF output can be strapped to the CLKIN\ input for a single-ended CLKIN input.

The CDCVF111 is characterized for operation from –40°C to 85°C.
filter 기타 클록 버퍼 찾기
다운로드

기술 자료

star =TI에서 선정한 이 제품의 인기 문서
검색된 결과가 없습니다. 검색어를 지우고 다시 시도하십시오.
1개 모두 보기
유형 직함 날짜
* Data sheet 1:9 Differential LVPECL Clock Driver datasheet (Rev. B) 2002/06/07

주문 및 품질

포함된 정보:
  • RoHS
  • REACH
  • 디바이스 마킹
  • 납 마감/볼 재질
  • MSL 등급/피크 리플로우
  • MTBF/FIT 예측
  • 물질 성분
  • 인증 요약
  • 지속적인 신뢰성 모니터링
포함된 정보:
  • 팹 위치
  • 조립 위치