제품 상세 정보

Resolution (Bits) 10 Number of DAC channels 2 Interface type Parallel CMOS Sample/update rate (Msps) 275 Features Low Power Rating Catalog Interpolation 1x Power consumption (typ) (mW) 290 SFDR (dB) 80 Architecture Current Source Operating temperature range (°C) -40 to 85 Reference type Ext, Int
Resolution (Bits) 10 Number of DAC channels 2 Interface type Parallel CMOS Sample/update rate (Msps) 275 Features Low Power Rating Catalog Interpolation 1x Power consumption (typ) (mW) 290 SFDR (dB) 80 Architecture Current Source Operating temperature range (°C) -40 to 85 Reference type Ext, Int
VQFN (RSL) 48 36 mm² (6 mm × 6 mm) TQFP (PFB) 48 81 mm² (9 mm × 9 mm)
  • 10-Bit Dual Transmit DAC
  • 275 MSPS Update Rate
  • Single Supply: 3.0 V to 3.6 V
  • High Spurious-Free Dynamic Range (SFDR): 80 dBc at 5 MHz
  • High Third-Order Two-Tone Intermodulation (IMD3): 78 dBc at 15.1 MHz and 16.1 MHz
  • Independent or Single Resistor Gain Control
  • Dual or Interleaved Data
  • On-Chip 1.2-V Reference
  • Low Power: 290 mW
  • Power-Down Mode: 9 mW
  • Packages:
    • 48-Pin Thin-Quad Flat Pack (TQFP)
    • 48-Pin Very-Thin-Quad Flat No-Leads (VQFN)
  • 10-Bit Dual Transmit DAC
  • 275 MSPS Update Rate
  • Single Supply: 3.0 V to 3.6 V
  • High Spurious-Free Dynamic Range (SFDR): 80 dBc at 5 MHz
  • High Third-Order Two-Tone Intermodulation (IMD3): 78 dBc at 15.1 MHz and 16.1 MHz
  • Independent or Single Resistor Gain Control
  • Dual or Interleaved Data
  • On-Chip 1.2-V Reference
  • Low Power: 290 mW
  • Power-Down Mode: 9 mW
  • Packages:
    • 48-Pin Thin-Quad Flat Pack (TQFP)
    • 48-Pin Very-Thin-Quad Flat No-Leads (VQFN)

The DAC5652A is a monolithic, dual-channel, 10-bit, high-speed digital-to-analog converter (DAC) with on-chip voltage reference.

Operating with update rates of up to 275 MSPS, the DAC5652A offers exceptional dynamic performance, tight-gain, and offset matching characteristics that make it suitable in either I/Q baseband or direct IF communication applications.

Each DAC has a high-impedance, differential-current output, suitable for single-ended or differential analog-output configurations. External resistors allow scaling of the full-scale output current for each DAC separately or together, typically between 2 mA and 20 mA. An accurate on-chip voltage reference is temperature-compensated and delivers a stable 1.2-V reference voltage. Optionally, an external reference may be used.

The DAC5652A has two, 10-bit, parallel input ports with separate clocks and data latches. For flexibility, the DAC5652A also supports multiplexed data for each DAC on one port when operating in the interleaved mode.

The DAC5652A has been specifically designed for a differential transformer-coupled output with a 50-Ω doubly-terminated load. For a 20-mA full-scale output current, both a 4:1 impedance ratio (resulting in an output power of 4 dBm) and 1:1 impedance ratio transformer (–2-dBm output power) are supported.

The DAC5652A is available in 48-pin TQFP and 48-pin VQFN packages. The TQFP package offers pin compatibility between family members that provides 10-bit (DAC5652A), 12-bit (DAC5662), and 14-bit (DAC5672) resolution. The TQFP package is also pin compatible to the DAC2900 and AD9763 dual DACs. The device is characterized for operation over the industrial temperature range of –40°C to +85°C.

The DAC5652A is a monolithic, dual-channel, 10-bit, high-speed digital-to-analog converter (DAC) with on-chip voltage reference.

Operating with update rates of up to 275 MSPS, the DAC5652A offers exceptional dynamic performance, tight-gain, and offset matching characteristics that make it suitable in either I/Q baseband or direct IF communication applications.

Each DAC has a high-impedance, differential-current output, suitable for single-ended or differential analog-output configurations. External resistors allow scaling of the full-scale output current for each DAC separately or together, typically between 2 mA and 20 mA. An accurate on-chip voltage reference is temperature-compensated and delivers a stable 1.2-V reference voltage. Optionally, an external reference may be used.

The DAC5652A has two, 10-bit, parallel input ports with separate clocks and data latches. For flexibility, the DAC5652A also supports multiplexed data for each DAC on one port when operating in the interleaved mode.

The DAC5652A has been specifically designed for a differential transformer-coupled output with a 50-Ω doubly-terminated load. For a 20-mA full-scale output current, both a 4:1 impedance ratio (resulting in an output power of 4 dBm) and 1:1 impedance ratio transformer (–2-dBm output power) are supported.

The DAC5652A is available in 48-pin TQFP and 48-pin VQFN packages. The TQFP package offers pin compatibility between family members that provides 10-bit (DAC5652A), 12-bit (DAC5662), and 14-bit (DAC5672) resolution. The TQFP package is also pin compatible to the DAC2900 and AD9763 dual DACs. The device is characterized for operation over the industrial temperature range of –40°C to +85°C.

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기술 자료

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* 데이터 시트 DAC5652A Dual, 10-Bit, 275-MSPS Digital-to-Analog Converter datasheet (Rev. F) PDF | HTML 2018. 10. 10
애플리케이션 노트 High Speed, Digital-to-Analog Converters Basics (Rev. A) 2012. 10. 23

설계 및 개발

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평가 보드

DAC5652AEVM — DAC5652A 듀얼 채널, 10비트, 275MSPS 디지털-아날로그 컨버터(DAC) 평가 모듈

DAC5652A EVM(평가 모듈)은 10비트, 275MSPS DAC(디지털-아날로그 컨버터)인 DAC5652A를 평가하는 데 사용됩니다. DAC5652AEVM에는 DAC5652A 풀 스케일 출력 샘플링 범위를 수용할 수 있는 단일 종단 변압기 결합 아날로그 출력이 있습니다. 이 EVM은 TI의 TSW1400EVM 데이터 캡처/패턴 생성기 툴과 직접 연결하도록 설계되었습니다.

고속 데이터 컨버터 프로 소프트웨어(DATACONVERTERPRO-SW) 분석 툴을 통해 추가 지원이 제공됩니다. 또한 회로도, 거버 및 BOM(재료 (...)

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시뮬레이션 모델

DAC5652A IBIS Model

SLAM328.ZIP (7 KB) - IBIS 모델
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IBIS Model for DAC5652A

SLAC171.IBS (11 KB) - IBIS 모델
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패키지 CAD 기호, 풋프린트 및 3D 모델
VQFN (RSL) 48 Ultra Librarian
TQFP (PFB) 48 Ultra Librarian

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