SN74LVC1G08-Q1

Name: SN74LVC1G08-Q1
Brand: TI
SKU: SN74LVC1G08-Q1
Price: 0.07 USD

활성

오토모티브, 1채널 2입력 1.65V~5.5V 32mA 드라이브 강도 AND 게이트

지금 주문

데이터시트

document-pdfAcrobat SN74LVC1G08-Q1 Single 2-input positive-AND gate datasheet (Rev. G) (영어) PDF | HTML

SN74LVC1G08-Q1

활성

데이터시트

지금 주문

제품 상세 정보

Technology family

LVC

Supply voltage (min) (V)

1.65

Supply voltage (max) (V)

5.5

Number of channels

Inputs per channel

IOL (max) (mA)

IOH (max) (mA)

-32

Input type

Standard CMOS

Output type

Push-Pull

Features

Over-voltage tolerant inputs, Partial power down (Ioff), Ultra high speed (tpd <5ns)

Data rate (max) (Mbps)

100

Rating

Automotive

Operating temperature range (°C)

-40 to 125

Technology family

LVC

Supply voltage (min) (V)

1.65

Supply voltage (max) (V)

5.5

Number of channels

Inputs per channel

IOL (max) (mA)

IOH (max) (mA)

-32

Input type

Standard CMOS

Output type

Push-Pull

Features

Over-voltage tolerant inputs, Partial power down (Ioff), Ultra high speed (tpd <5ns)

Data rate (max) (Mbps)

100

Rating

Automotive

Operating temperature range (°C)

-40 to 125

SOT-23 (DBV)

8.12 mm² 2.9 x 2.8

SOT-SC70 (DCK)

4.2 mm² 2 x 2.1

USON (DRY)

1.45 mm² 1.45 x 1

AEC-Q100 Qualified for Automotive Applications:
- Device Temperature Grade 1: –40°C to +125°C, T_A
Supports 5-V V_CC Operation
Over-voltage Tolerant Inputs Accept Voltages to 5.5 V
Provides Down Translation to V_CC
Low Power Consumption, 10-µA Max I_CC
±24-mA Output Drive at 3.3 V
I_off Supports Live Insertion, Partial-Power-Down Mode, and Back Drive Protection
Latch-Up Performance Exceeds 100 mA
Per JESD 78, Class II
ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)

AEC-Q100 Qualified for Automotive Applications:
- Device Temperature Grade 1: –40°C to +125°C, T_A
Supports 5-V V_CC Operation
Over-voltage Tolerant Inputs Accept Voltages to 5.5 V
Provides Down Translation to V_CC
Low Power Consumption, 10-µA Max I_CC
±24-mA Output Drive at 3.3 V
I_off Supports Live Insertion, Partial-Power-Down Mode, and Back Drive Protection
Latch-Up Performance Exceeds 100 mA
Per JESD 78, Class II
ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)

This single 2-input positive-AND gate is designed for 1.65-V to 5.5-V V_CC operation.

The SN74LVC1G08-Q1 device performs the Boolean function or in positive logic.

This device is fully specified for partial-power-down applications using I off. The I off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

The CMOS device has high output drive while maintaining low static power dissipation over a broad V_CC operating range.

The SN74LVC1G08 is available in a variety of packages, including the small DRY package with a body size of 1.45 mm × 1.00 mm.

This single 2-input positive-AND gate is designed for 1.65-V to 5.5-V V_CC operation.

The SN74LVC1G08-Q1 device performs the Boolean function or in positive logic.

The CMOS device has high output drive while maintaining low static power dissipation over a broad V_CC operating range.

The SN74LVC1G08 is available in a variety of packages, including the small DRY package with a body size of 1.45 mm × 1.00 mm.

open-in-new

기타 AND 게이트 찾기

다운로드 스크립트와 함께 비디오 보기 동영상

관심 가지실만한 유사 제품

open-in-new

대안 비교

비교 대상 장치와 동일한 기능을 지원하는 핀 대 핀

SN74AUP1G08-Q1

활성

오토모티브, 1채널, 2입력, 0.8V~3.6V 저전력(< 1uA) AND 게이트 Smaller voltage range (0.8V to 3.6V), longer average propagation delay (8ns), lower average drive strength (4mA)

기술 문서

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모두 보기31

	유형	직함		날짜
*	Data sheet	SN74LVC1G08-Q1 Single 2-input positive-AND gate datasheet (Rev. G)	PDF \| HTML	2019/05/20
	Application brief	Optimizing ADAS Domain Controllers Using Logic and Translation	PDF \| HTML	2023/07/13
	Product overview	Generate an Enable Signal that can be Toggled	PDF \| HTML	2023/06/14
	Application note	Implications of Slow or Floating CMOS Inputs (Rev. E)		2021/07/26
	Functional safety information	SN74LVC1G08-Q1 Functional Safety FIT Rate and Failure Mode Distribution		2019/12/30
	Selection guide	Little Logic Guide 2018 (Rev. G)		2018/07/06
	Selection guide	Logic Guide (Rev. AB)		2017/06/12
	Application note	How to Select Little Logic (Rev. A)		2016/07/26
	Application note	Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)		2015/12/02
	More literature	Automotive Logic Devices Brochure		2014/08/27
	User guide	LOGIC Pocket Data Book (Rev. B)		2007/01/16
	Product overview	Design Summary for WCSP Little Logic (Rev. B)		2004/11/04
	Application note	Semiconductor Packing Material Electrostatic Discharge (ESD) Protection		2004/07/08
	Application note	Selecting the Right Level Translation Solution (Rev. A)		2004/06/22
	User guide	Signal Switch Data Book (Rev. A)		2003/11/14
	Application note	Use of the CMOS Unbuffered Inverter in Oscillator Circuits		2003/11/06
	User guide	LVC and LV Low-Voltage CMOS Logic Data Book (Rev. B)		2002/12/18
	Application note	Texas Instruments Little Logic Application Report		2002/11/01
	Application note	TI IBIS File Creation, Validation, and Distribution Processes		2002/08/29
	More literature	Standard Linear & Logic for PCs, Servers & Motherboards		2002/06/13
	Application note	16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)		2002/05/22
	Application note	Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices		2002/05/10
	More literature	STANDARD LINEAR AND LOGIC FOR DVD/VCD PLAYERS		2002/03/27
	Application note	Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices		1997/12/01
	Application note	Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)		1997/08/01
	Application note	CMOS Power Consumption and CPD Calculation (Rev. B)		1997/06/01
	Application note	LVC Characterization Information		1996/12/01
	Application note	Input and Output Characteristics of Digital Integrated Circuits		1996/10/01
	Application note	Live Insertion		1996/10/01
	Design guide	Low-Voltage Logic (LVC) Designer's Guide		1996/09/01
	Application note	Understanding Advanced Bus-Interface Products Design Guide		1996/05/01

설계 및 개발

추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.

평가 보드

5-8-LOGIC-EVM — 5핀~8핀 DCK, DCT, DCU, DRL 및 DBV 패키지용 일반 논리 평가 모듈

5~8핀 수의 DCK, DCT, DCU, DRL 또는 DBV 패키지가 있는 모든 디바이스를 지원하도록 설계된 유연한 EVM.

사용 설명서: PDF

TI.com에서 구매할 수 없습니다

평가 보드

DIP-ADAPTER-EVM — DIP 어댑터 평가 모듈

소형 표면 실장 IC(집적 회로)와 쉽고 빠르며 경제적인 방식으로 인터페이싱하는 방법을 제공하는 DIP 어댑터 평가 모듈(DIP-ADAPTER-EVM)로 연산 증폭기 프로토타이핑 및 테스트 속도를 높이세요. 제품에 포함된 Samtec 터미널 스트립을 사용하여 지원되는 연산 증폭기를 연결하거나 기존 회로에 직접 연결할 수 있습니다.

DIP 어댑터 EVM 키트는 다음을 포함해 가장 널리 사용되는 6개의 업계 표준 패키지를 지원합니다.

D 및 U(SOIC-8)
PW(TSSOP-8)
DGK(MSOP-8, VSSOP-8)
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사용 설명서: PDF

TI.com에서 구매할 수 없습니다

시뮬레이션 모델

SN74LVC1G08 Behavioral SPICE Model

SCEM642.ZIP (7 KB) - PSpice Model

다운로드

레퍼런스 디자인

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This reference design provides a broadly-applicable automotive power design for a variety of ADAS processors, focusing on front and rear camera applications. The design supports an input range of 4 V to 48 V to supply common processor power rails through discrete components. This adds to the (...)

Design guide: PDF

회로도: PDF