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THS4524

활성

초저전력 쿼드 채널 레일-투-레일 출력 완전 차동 증폭기

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데이터 시트

THS4524

활성
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제품 상세 정보

Number of channels 4 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 2.5 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 5.5 BW at Acl (MHz) 145 Acl, min spec gain (V/V) 1 Slew rate (typ) (V/µs) 490 Architecture Bipolar, Fully Differential ADC Driver Vn at flatband (typ) (nV√Hz) 4.6 Iq per channel (typ) (mA) 1.14 Rail-to-rail In to V-, Out Vos (offset voltage at 25°C) (max) (mV) 2 Operating temperature range (°C) -40 to 85 Iout (typ) (mA) 55 2nd harmonic (dBc) 133 3rd harmonic (dBc) 141 Frequency of harmonic distortion measurement (MHz) 0.001 GBW (typ) (MHz) 95 Input bias current (max) (pA) 900000 Features Shutdown CMRR (typ) (dB) 102 Rating Catalog
Number of channels 4 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 2.5 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 5.5 BW at Acl (MHz) 145 Acl, min spec gain (V/V) 1 Slew rate (typ) (V/µs) 490 Architecture Bipolar, Fully Differential ADC Driver Vn at flatband (typ) (nV√Hz) 4.6 Iq per channel (typ) (mA) 1.14 Rail-to-rail In to V-, Out Vos (offset voltage at 25°C) (max) (mV) 2 Operating temperature range (°C) -40 to 85 Iout (typ) (mA) 55 2nd harmonic (dBc) 133 3rd harmonic (dBc) 141 Frequency of harmonic distortion measurement (MHz) 0.001 GBW (typ) (MHz) 95 Input bias current (max) (pA) 900000 Features Shutdown CMRR (typ) (dB) 102 Rating Catalog
TSSOP (DBT) 38 62.08 mm² (9.7 mm × 6.4 mm)
  • Fully Differential Architecture
  • Bandwidth: 145 MHz (AV = 1 V/V)
  • Slew Rate: 490 V/µs
  • HD2: –133 dBc at 10 kHz (1 VRMS,
    RL = 1 kΩ)
  • HD3: –141 dBc at 10 kHz (1 VRMS,
    RL = 1 kΩ)
  • Input Voltage Noise: 4.6 nV/√Hz
    (f = 100 kHz)
  • THD+N: –112dBc (0.00025%) at
    1 kHz (22-kHz BW, G = 1, 5 VPP)
  • Open-Loop Gain: 119 dB (DC)
  • NRI–Negative Rail Input
  • RRO–Rail-to-Rail Output
  • Output Common-Mode Control
    (with Low Offset)
  • Power Supply:
    • Voltage: +2.5 V (±1.25 V) to
      +5.5 V (±2.75 V)
    • Current: 1.14 mA/ch
  • Power-Down Capability: 20 µA (typical)
  • Fully Differential Architecture
  • Bandwidth: 145 MHz (AV = 1 V/V)
  • Slew Rate: 490 V/µs
  • HD2: –133 dBc at 10 kHz (1 VRMS,
    RL = 1 kΩ)
  • HD3: –141 dBc at 10 kHz (1 VRMS,
    RL = 1 kΩ)
  • Input Voltage Noise: 4.6 nV/√Hz
    (f = 100 kHz)
  • THD+N: –112dBc (0.00025%) at
    1 kHz (22-kHz BW, G = 1, 5 VPP)
  • Open-Loop Gain: 119 dB (DC)
  • NRI–Negative Rail Input
  • RRO–Rail-to-Rail Output
  • Output Common-Mode Control
    (with Low Offset)
  • Power Supply:
    • Voltage: +2.5 V (±1.25 V) to
      +5.5 V (±2.75 V)
    • Current: 1.14 mA/ch
  • Power-Down Capability: 20 µA (typical)

The THS4521, THS4522, and THS4524 family of devices are very low-power, fully differential amplifiers with rail-to-rail output and an input common-mode range that includes the negative rail. These amplifiers are designed for low-power data acquisition systems and high-density applications where power dissipation is a critical parameter, and provide exceptional performance in audio applications.

The family includes single FDA (THS4521), dual FDA (THS4522), and quad FDA (THS4524) versions.

These fully differential amplifiers feature accurate output common-mode control that allows for dc-coupling when driving analog-to-digital converters (ADCs). This control, coupled with an input common-mode range below the negative rail as well as rail-to-rail output, allows for easy interfacing between single-ended, ground-referenced signal sources. Additionally, these devices are ideally suited for driving both successive-approximation register (SAR) and delta-sigma (ΔΣ) ADCs using only a single +2.5V to +5V and ground power supply.

The THS4521, THS4522, and THS4524 family of fully differential amplifiers is characterized for operation over the full industrial temperature range from –40°C to +85°C.

The THS4521, THS4522, and THS4524 family of devices are very low-power, fully differential amplifiers with rail-to-rail output and an input common-mode range that includes the negative rail. These amplifiers are designed for low-power data acquisition systems and high-density applications where power dissipation is a critical parameter, and provide exceptional performance in audio applications.

The family includes single FDA (THS4521), dual FDA (THS4522), and quad FDA (THS4524) versions.

These fully differential amplifiers feature accurate output common-mode control that allows for dc-coupling when driving analog-to-digital converters (ADCs). This control, coupled with an input common-mode range below the negative rail as well as rail-to-rail output, allows for easy interfacing between single-ended, ground-referenced signal sources. Additionally, these devices are ideally suited for driving both successive-approximation register (SAR) and delta-sigma (ΔΣ) ADCs using only a single +2.5V to +5V and ground power supply.

The THS4521, THS4522, and THS4524 family of fully differential amplifiers is characterized for operation over the full industrial temperature range from –40°C to +85°C.
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기술 자료

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14개 모두 보기
상위 문서 유형 직함 형식 옵션 최신 영어 버전 다운로드 날짜
* 데이터 시트 THS452x Very Low Power, Negative Rail Input, Rail-To-Rail Output, Fully Differential Amplifier datasheet (Rev. H) PDF | HTML 2015. 6. 18
Application brief Why Use an FDA to Drive an ADC? PDF | HTML 2026. 1. 8
Application brief Active Filter Design for Differential ADCs (Rev. A) PDF | HTML 2025. 10. 8
Circuit design Single-ended input to differential output circuit using a fully-differential amp (Rev. A) PDF | HTML 2024. 9. 25
e북 Engineer's Guide to High-Speed Amplifiers PDF | HTML 2023. 10. 18
애플리케이션 노트 Attenuator Amplifier Design to Maximize the Input Voltage of Differential ADCs 2018. 6. 14
e북 The Signal e-book: A compendium of blog posts on op amp design topics PDF | HTML 2017. 3. 28
애플리케이션 노트 Fully-Differential Amplifiers (Rev. E) 2016. 9. 19
아날로그 디자인 학술지 Using single-supply fully diff. amps with neg. input voltages to drive ADCs 2010. 11. 15
아날로그 디자인 학술지 Using fully differential op amps as attenuators, Part 3 2009. 10. 4
아날로그 디자인 학술지 Using fully differential op amps as attenuators, Part 2 2009. 7. 14
아날로그 디자인 학술지 Analysis of fully differential amplifiers 2005. 3. 11
아날로그 디자인 학술지 Designing for low distortion with high-speed op amps 2005. 3. 2
애플리케이션 노트 Noise Analysis for High Speed Op Amps (Rev. A) 2005. 1. 17

설계 및 개발

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평가 보드

THS4524EVM — THS4524 평가 모듈

The THS4524EVM is an evaluation module for the quad, THS4524 in the DBT (38-lead TSSOP) package.

The THS4524EVM is designed to quickly and easily demonstrate the functionality and versatility of the amplifier. The EVM is ready to connect to power, signal source, and test instruments through the use (...)

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시뮬레이션 모델

THS4524 PSpice Model (Rev. B)

SBOMA76B.ZIP (22 KB) - PSpice 모델
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시뮬레이션 모델

THS4524 TINA-TI Reference Design (Rev. A)

SBOMA77A.TSC (66 KB) - TINA-TI 레퍼런스 설계
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THS4524 TINA-TI Spice Model (Rev. A)

SBOMA78A.ZIP (16 KB) - Tina-TI Spice 모델
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계산 툴

SBOR022 — TI FDA Calculator

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TSSOP (DBT) 38 Ultra Librarian
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