제품 상세 정보

PGA/VGA VGA Number of channels 1 Vs (min) (V) 4.5 Vs (max) (V) 5.5 Input type Differential, Single-ended Output type Differential Interface type Analog Gain Set BW at Acl (MHz) 300 Acl, min spec gain (V/V) 3.8 Voltage gain (min) (V/V) 3.8 Voltage gain (max) (V/V) 211 Gain (max) (dB) 46.5 Architecture Fully Differential ADC Driver Features Digital Gain Set, Integrated Clamps, Shutdown, Single-ended to Differential conversion Vos (offset voltage at 25°C) (typ) (mV) 100 Input voltage noise (typ) (µV√Hz) 0.0011 Slew rate (typ) (V/µs) 1250 Iq per channel (typ) (mA) 40 Rating Catalog Operating temperature range (°C) -40 to 85
PGA/VGA VGA Number of channels 1 Vs (min) (V) 4.5 Vs (max) (V) 5.5 Input type Differential, Single-ended Output type Differential Interface type Analog Gain Set BW at Acl (MHz) 300 Acl, min spec gain (V/V) 3.8 Voltage gain (min) (V/V) 3.8 Voltage gain (max) (V/V) 211 Gain (max) (dB) 46.5 Architecture Fully Differential ADC Driver Features Digital Gain Set, Integrated Clamps, Shutdown, Single-ended to Differential conversion Vos (offset voltage at 25°C) (typ) (mV) 100 Input voltage noise (typ) (µV√Hz) 0.0011 Slew rate (typ) (V/µs) 1250 Iq per channel (typ) (mA) 40 Rating Catalog Operating temperature range (°C) -40 to 85
HTSSOP (PWP) 14 32 mm² (5 mm × 6.4 mm)
  • Low Noise: Vn = 1.1 nV/√ Hz, Noise Figure = 9 dB
  • Low Distortion:
    • HD2 = –65 dBc, HD3 = –61 dBc at 32 MHz
    • IMD3 = –62 dBc, OIP3 = 21 dBm at 70 MHz
  • 300-MHz Bandwidth
  • Continuously Variable Gain Range: 11.6 dB to 46.5 dB
  • Gain Slope: 38.8 dB/V
  • Fully Differential Input and Output
  • Output Common-Mode Voltage Control
  • Output Voltage Limiting
  • Low Noise: Vn = 1.1 nV/√ Hz, Noise Figure = 9 dB
  • Low Distortion:
    • HD2 = –65 dBc, HD3 = –61 dBc at 32 MHz
    • IMD3 = –62 dBc, OIP3 = 21 dBm at 70 MHz
  • 300-MHz Bandwidth
  • Continuously Variable Gain Range: 11.6 dB to 46.5 dB
  • Gain Slope: 38.8 dB/V
  • Fully Differential Input and Output
  • Output Common-Mode Voltage Control
  • Output Voltage Limiting

The THS7530 device is fabricated using Texas Instruments’ state-of-the-art BiCom III SiGe complementary bipolar process. The THS7530 device is a DC-coupled, wide bandwidth amplifier with voltage-controlled gain. The amplifier has high-impedance differential inputs and low-impedance differential outputs with high-bandwidth gain control, output common-mode control, and output voltage clamping.

Signal-channel performance is exceptional with 300-MHz bandwidth, and third harmonic distortion of –61 dBc at 32 MHz with 1-VPP output into 400 Ω.

Gain control is linear in dB with 0 V to 0.9 V varying the gain from 11.6 dB to 46.5 dB with 38.8-dB/V gain slope.

Output voltage limiting is provided to limit the output voltage swing and to prevent saturating following stages.

The device is characterized for operation over the industrial temperature range, –40°C to +85°C.  

The THS7530 device is fabricated using Texas Instruments’ state-of-the-art BiCom III SiGe complementary bipolar process. The THS7530 device is a DC-coupled, wide bandwidth amplifier with voltage-controlled gain. The amplifier has high-impedance differential inputs and low-impedance differential outputs with high-bandwidth gain control, output common-mode control, and output voltage clamping.

Signal-channel performance is exceptional with 300-MHz bandwidth, and third harmonic distortion of –61 dBc at 32 MHz with 1-VPP output into 400 Ω.

Gain control is linear in dB with 0 V to 0.9 V varying the gain from 11.6 dB to 46.5 dB with 38.8-dB/V gain slope.

Output voltage limiting is provided to limit the output voltage swing and to prevent saturating following stages.

The device is characterized for operation over the industrial temperature range, –40°C to +85°C.  

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기술 자료

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* 데이터 시트 THS7530 High-Speed, Fully Differential, Continuously Variable Gain Amplifier datasheet (Rev. E) PDF | HTML 2020. 8. 14
e북 The Signal e-book: A compendium of blog posts on op amp design topics PDF | HTML 2017. 3. 28

설계 및 개발

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평가 보드

THS7530EVM — THS7530 평가 모듈

The THS7530 EVM provides 50 ohm input and output termination for easy evaluation with common 50 ohm test equipment.

사용 설명서: PDF
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시뮬레이션 모델

THS7530 PSpice Model (Rev. A)

SLOJ139A.ZIP (36 KB) - PSpice 모델
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시뮬레이션 모델

THS7530 TINA-TI Reference Design (Rev. B)

SLAC091B.TSC (123 KB) - TINA-TI 레퍼런스 설계
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시뮬레이션 모델

THS7530 TINA-TI Spice Model (Rev. A)

SLAM020A.ZIP (4 KB) - Tina-TI Spice 모델
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패키지 CAD 기호, 풋프린트 및 3D 모델
HTSSOP (PWP) 14 Ultra Librarian

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