TLV4825

활성

쿼드 5.5V, 3MHz, 제로 드리프트 CMOS 정밀 연산 증폭기

제품 상세 정보

Number of channels 4 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 5.5 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 1.8 Vos (offset voltage at 25°C) (max) (mV) 0.004 Offset drift (typ) (µV/°C) 0.02 GBW (typ) (MHz) 3.5 Features Cost Optimized, Zero Drift Slew rate (typ) (V/µs) 1.8 Rail-to-rail In-Out Iq per channel (typ) (mA) 0.5 CMRR (typ) (dB) 120 Rating Catalog Operating temperature range (°C) -40 to 125 Architecture CMOS Input common mode headroom (to negative supply) (typ) (V) -0.1 Input common mode headroom (to positive supply) (typ) (V) 0.1 Output swing headroom (to negative supply) (typ) (V) 0.007 Output swing headroom (to positive supply) (typ) (V) -0.007
Number of channels 4 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 5.5 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 1.8 Vos (offset voltage at 25°C) (max) (mV) 0.004 Offset drift (typ) (µV/°C) 0.02 GBW (typ) (MHz) 3.5 Features Cost Optimized, Zero Drift Slew rate (typ) (V/µs) 1.8 Rail-to-rail In-Out Iq per channel (typ) (mA) 0.5 CMRR (typ) (dB) 120 Rating Catalog Operating temperature range (°C) -40 to 125 Architecture CMOS Input common mode headroom (to negative supply) (typ) (V) -0.1 Input common mode headroom (to positive supply) (typ) (V) 0.1 Output swing headroom (to negative supply) (typ) (V) 0.007 Output swing headroom (to positive supply) (typ) (V) -0.007
TSSOP (PW) 14 32 mm² (5 mm × 6.4 mm) SOIC (D) 14 51.9 mm² (8.65 mm × 6 mm)
  • Ultra-low offset drift: ±0.02µV/°C
  • Flat low frequency noise: 0.3µVPP (0.1 to 10Hz)
  • Ultra-low offset: ±4µV
  • Rail-to-rail input and output
  • Very high AOL, CMRR, PSRR: > 120dB
  • Wide input common-mode: 100mV beyond rails
  • Low input bias current: ±100pA
  • Low thermal noise floor: 15nV/√Hz
  • Wide gain bandwidth: 3.5MHz
  • High CL drive: 1nF (no sustained oscillations)
  • Low quiescent current: 500µA/channel
  • Wide supply range: 1.8V to 5.5V
  • Wide temperature range: –40°C to +125°C
  • Ultra-low offset drift: ±0.02µV/°C
  • Flat low frequency noise: 0.3µVPP (0.1 to 10Hz)
  • Ultra-low offset: ±4µV
  • Rail-to-rail input and output
  • Very high AOL, CMRR, PSRR: > 120dB
  • Wide input common-mode: 100mV beyond rails
  • Low input bias current: ±100pA
  • Low thermal noise floor: 15nV/√Hz
  • Wide gain bandwidth: 3.5MHz
  • High CL drive: 1nF (no sustained oscillations)
  • Low quiescent current: 500µA/channel
  • Wide supply range: 1.8V to 5.5V
  • Wide temperature range: –40°C to +125°C

The TLVx825 family of single, dual, and quad channel operational amplifiers enable precision performance such as lower offset, lower offset drift over temperature, greater offset stability over time and a flat noise floor. This level of performance is crucial to a variety of systems focusing on precision voltage sensing from sensors and precision current sensing using smaller shunt resistors.

TLVx825 uses zero-drift architecture to achieve an input referred offset voltage of 4µV, an offset drift of 0.02µV/°C and a low frequency noise of 320nVPP in the standard 0.1 – 10Hz range. This combination of specs provides excellent accuracy in high gain applications, thereby greatly reducing the need for system level calibration.

Additionally, with a quiescent current of 500µA, the TLVx825 is able to achieve a bandwidth of 3.5MHz and a broadband noise of 15nV/√Hz. This ability is crucial to achieve higher linearity, and signal-to-noise ratio in applications involving higher resolution, mid-speed analog to digital converters (ADCs) while minimizing system power.

TLVx825 is operational from 1.8V to 5.5V, and is available in standard packages for broader industrial applications as well as the micro-size packages to fit in the space-constrained portable applications. The devices are specified for operation from –40°C to +125°C.

The TLVx825 family of single, dual, and quad channel operational amplifiers enable precision performance such as lower offset, lower offset drift over temperature, greater offset stability over time and a flat noise floor. This level of performance is crucial to a variety of systems focusing on precision voltage sensing from sensors and precision current sensing using smaller shunt resistors.

TLVx825 uses zero-drift architecture to achieve an input referred offset voltage of 4µV, an offset drift of 0.02µV/°C and a low frequency noise of 320nVPP in the standard 0.1 – 10Hz range. This combination of specs provides excellent accuracy in high gain applications, thereby greatly reducing the need for system level calibration.

Additionally, with a quiescent current of 500µA, the TLVx825 is able to achieve a bandwidth of 3.5MHz and a broadband noise of 15nV/√Hz. This ability is crucial to achieve higher linearity, and signal-to-noise ratio in applications involving higher resolution, mid-speed analog to digital converters (ADCs) while minimizing system power.

TLVx825 is operational from 1.8V to 5.5V, and is available in standard packages for broader industrial applications as well as the micro-size packages to fit in the space-constrained portable applications. The devices are specified for operation from –40°C to +125°C.

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기술 자료

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기술 문서 모든 설계에 대한 정밀 증폭기 성능 구현 PDF | HTML 2026. 6. 30

설계 및 개발

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평가 보드

AMP-PDK-EVM — 증폭기 성능 개발 키트 평가 모듈

증폭기 성능 개발 키트(PDK)는 일반적인 연산 증폭기(OP 앰프) 매개 변수를 테스트할 수 있는 평가 모듈(EVM) 키트입니다. 대부분의 연산 증폭기 및 콤퍼레이터와 호환됩니다. EVM 키트는 패키지 요구 사항에 맞는 여러 소켓형 부속 카드 옵션이 있는 메인 보드를 제공하여 엔지니어가 디바이스 성능을 신속하게 평가하고 확인할 수 있습니다.

AMP-PDK-EVM 키트는 다음을 포함해 가장 널리 사용되는 5개의 업계 표준 패키지를 지원합니다.

  • D(SOIC-8 및 SOIC-14)
  • PW(TSSOP-14)
  • DGK(VSSOP-8)
  • (...)
사용 설명서: PDF | HTML
지원되는 제품 및 하드웨어
시뮬레이션 모델

TLV825, TLV2825 and TLV4825 TINA-TI SPICE Model (Rev. A)

SLVMF11A.ZIP (33 KB) - Tina-TI Spice 모델
지원되는 제품 및 하드웨어
패키지 CAD 기호, 풋프린트 및 3D 모델
TSSOP (PW) 14 Ultra Librarian
SOIC (D) 14 Ultra Librarian

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지원 및 교육

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