TRF372017
- Fully Integrated PLL/VCO and IQ Modulator
- LO Frequency from 300 MHz to 4.8 GHz
- 76-dBc Single-Carrier WCDMA ACPR at –8-dBm
Channel Power - OIP3 of 26 dBm
- P1dB of 11.5 dBm
- Integer/Fractional PLL
- Phase Noise –132 dBc/Hz
(at 1 MHz, fVCO of 2.3 GHz) - Low Noise Floor: –160 dBm/Hz
- Input Reference Frequency Range: Up to
160 MHz - VCO Frequency Divided by 1-2-4-8 Output
- APPLICATIONS
- Wireless Infrastructure
- CDMA: IS95, UMTS, CDMA2000,
TD-SCDMA - TDMA: GSM, IS-136, EDGE/UWC-136
- LTE
- CDMA: IS95, UMTS, CDMA2000,
- Wireless Local Loop
- Point-to-Point Wireless Access
- Wireless MAN Wideband Transceivers
- Wireless Infrastructure
All other trademarks are the property of their respective owners
TRF372017 is a high-performance, direct up-conversion device, integrating a high-linearity, low-noise IQ modulator and an integer-fractional PLL/VCO. The VCO uses integrated frequency dividers to achieve a wide, continuous tuning range of 300 MHz to 4800 MHz. The LO is available as an output with independent frequency dividers. The device also accepts input from an external LO or VCO. The modulator baseband inputs can be biased either internally or externally. Internal DC offset adjustment enables carrier cancellation. The device is controlled through a 3-wire serial programming interface (SPI). A control pin invokes power-save mode to reduce power consumption while keeping the VCO locked for fast start-up.
기술 자료
| 상위 문서 | 유형 | 직함 | 형식 옵션 | 최신 영어 버전 다운로드 | 날짜 |
|---|---|---|---|---|---|
| * | 데이터 시트 | TRF372017 Datasheet datasheet (Rev. E) | PDF | HTML | 2016. 1. 11 | |
| 기술 문서 | Can a clock generator act as a jitter cleaner? | PDF | HTML | 2017. 3. 23 | ||
| 기술 문서 | Don’t let bad reference signals destroy the phase noise in your PLL/synthesizer | PDF | HTML | 2017. 1. 10 | ||
| 기술 문서 | What to do when your PLL does not lock | PDF | HTML | 2016. 7. 12 | ||
| 기술 문서 | Issues with jitter, phase noise, lock time or spurs? Check the loop-filter bandwid | PDF | HTML | 2016. 6. 6 | ||
| 애플리케이션 노트 | Characterization Report for FMC30RF | 2014. 9. 18 | |||
| 설계 가이드 | Analog Interfacing Networks for DAC348x and Modulators (TIDA-00077) (Rev. A) | 2013. 8. 14 | |||
| 애플리케이션 노트 | Supply Noise Effect on Oscillator Phase Noise | 2011. 11. 22 | |||
| 사용 설명서 | TSW3725 Evaluation Module | 2011. 10. 25 | |||
| 애플리케이션 노트 | TRF372017 Noise Analysis (Rev. A) | 2011. 10. 7 | |||
| 애플리케이션 노트 | LO Harmonic Effect of I/Q Modulator Sideband Suppression | 2010. 5. 10 | |||
| 애플리케이션 노트 | Fractional/Integer-N PLL Basics | 1998. 5. 13 |
설계 및 개발
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| 패키지 | 핀 | CAD 기호, 풋프린트 및 3D 모델 |
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주문 및 품질
권장 제품에는 본 TI 제품과 관련된 매개 변수, 평가 모듈 또는 레퍼런스 디자인이 있을 수 있습니다.