產品詳細資料

Technology family AC Function Digital Multiplexer Configuration 2:1 Number of channels 4 Operating temperature range (°C) -55 to 125 Rating Military
Technology family AC Function Digital Multiplexer Configuration 2:1 Number of channels 4 Operating temperature range (°C) -55 to 125 Rating Military
CDIP (J) 16 135.3552 mm² 19.56 x 6.92
  • ’AC257, ’ACT257. . . . . . . . . . . . . Non-Inverting Outputs
  • CD74ACT258 . . . . . . . . . . . . . . . . . . . Inverting Outputs
  • Buffered Inputs
  • Typical Propagation Delay
    - 4.4ns at VCC = 5V, TA = 25°C, CL = 50pF
  • Exceeds 2kV ESD Protection MIL-STD-883, Method 3015
  • SCR-Latchup-Resistant CMOS Process and Circuit Design
  • Speed of Bipolar FAST™/AS/S with Significantly Reduced Power Consumption
  • Balanced Propagation Delays
  • AC Types Feature 1.5V to 5.5V Operation and Balanced Noise Immunity at 30% of the Supply
  • ±24mA Output Drive Current
    - Fanout to 15 FAST™ ICs
    Drives 50 Transmission Lines
  • Characterized for operation from –40° to 85°C

FAST™ is a Trademark of Fairchild Semiconductor.

  • ’AC257, ’ACT257. . . . . . . . . . . . . Non-Inverting Outputs
  • CD74ACT258 . . . . . . . . . . . . . . . . . . . Inverting Outputs
  • Buffered Inputs
  • Typical Propagation Delay
    - 4.4ns at VCC = 5V, TA = 25°C, CL = 50pF
  • Exceeds 2kV ESD Protection MIL-STD-883, Method 3015
  • SCR-Latchup-Resistant CMOS Process and Circuit Design
  • Speed of Bipolar FAST™/AS/S with Significantly Reduced Power Consumption
  • Balanced Propagation Delays
  • AC Types Feature 1.5V to 5.5V Operation and Balanced Noise Immunity at 30% of the Supply
  • ±24mA Output Drive Current
    - Fanout to 15 FAST™ ICs
    Drives 50 Transmission Lines
  • Characterized for operation from –40° to 85°C

FAST™ is a Trademark of Fairchild Semiconductor.

The ’AC257, ’ACT257 and CD74ACT258 are quad 2-input multiplexers with three-state outputs that utilize Advanced CMOS Logic technology. Each of these devices selects four bits of data from two sources under the control of a common Select input (S). The Output Enable (OE\) is active LOW. When OE\ is HIGH, all of the outputs (Y or Y\) are in the high-impedance state regardless of all other input conditions.

Moving data from two groups of registers to four common output buses is a common use of the ’AC257, ’ACT257, and CD74ACT258. The state of the Select input determines the particular register from which the data comes. The ’AC257, ’ACT257 and CD74ACT258 can also be used as function generators.

The ’AC257, ’ACT257 and CD74ACT258 are quad 2-input multiplexers with three-state outputs that utilize Advanced CMOS Logic technology. Each of these devices selects four bits of data from two sources under the control of a common Select input (S). The Output Enable (OE\) is active LOW. When OE\ is HIGH, all of the outputs (Y or Y\) are in the high-impedance state regardless of all other input conditions.

Moving data from two groups of registers to four common output buses is a common use of the ’AC257, ’ACT257, and CD74ACT258. The state of the Select input determines the particular register from which the data comes. The ’AC257, ’ACT257 and CD74ACT258 can also be used as function generators.

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類型 標題 日期
* Data sheet Quad 2-Input Multiplexer with Three-State Outputs datasheet (Rev. A) 2000年 5月 17日
Application note Implications of Slow or Floating CMOS Inputs (Rev. E) 2021年 7月 26日
Selection guide Logic Guide (Rev. AB) 2017年 6月 12日
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 2015年 12月 2日
More literature HiRel Unitrode Power Management Brochure 2009年 7月 7日
User guide LOGIC Pocket Data Book (Rev. B) 2007年 1月 16日
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 2004年 7月 8日
Application note TI IBIS File Creation, Validation, and Distribution Processes 2002年 8月 29日
Application note CMOS Power Consumption and CPD Calculation (Rev. B) 1997年 6月 1日
Application note Designing With Logic (Rev. C) 1997年 6月 1日
Application note Input and Output Characteristics of Digital Integrated Circuits 1996年 10月 1日
Application note Live Insertion 1996年 10月 1日
Application note Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc 1996年 4月 1日

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