首頁 介面 乙太網路 IC 乙太網路 PHY
首頁
介面
乙太網路 IC
乙太網路 PHY

DP83640

現行

IEEE 1588 精密時間協定 (PTP) 乙太網路 PHY 收發器

立即訂購
產品規格表

DP83640

現行
產品規格表 立即訂購

產品詳細資料

Datarate (Mbps) 10/100 Interface type MII, RMII Rating Catalog Number of ports Single Features Cable diagnostics, FX support, IEEE 1588 PTP, JTAG1149.1 I/O supply voltage (typ) (V) 2.5, 3.3 Operating temperature range (°C) -40 to 85 Number of LEDs 3 ESD HBM (kV) 8
Datarate (Mbps) 10/100 Interface type MII, RMII Rating Catalog Number of ports Single Features Cable diagnostics, FX support, IEEE 1588 PTP, JTAG1149.1 I/O supply voltage (typ) (V) 2.5, 3.3 Operating temperature range (°C) -40 to 85 Number of LEDs 3 ESD HBM (kV) 8
LQFP (PT) 48 81 mm² (9 mm × 9 mm)
  • IEEE 1588 V1 and V2 Supported
  • UDP/IPv4, UDP/IPv6, and Layer2 Ethernet
    Packets Supported
  • IEEE 1588 Clock Synchronization
  • Timestamp Resolution of 8 ns
  • Allows Sub 10-ns Synchronization to Master
    Reference
  • 12 IEEE 1588 GPIOs for Trigger or Capture
  • Deterministic, Low Transmit and Receive Latency
  • Selectable Frequency Synchronized Clock Output
  • Dynamic Link Quality Monitoring
  • TDR Based Cable Diagnostic and Cable Length
    Detection
  • 10/100 Mb/s Packet BIST (Built-in Self Test)
  • Error-Free Operation up to 150 Meters CAT5
    Cable
  • ESD Protection – 8 kV Human Body Model
  • 2.5-V and 3.3-V I/Os and MAC Interface
  • Auto-MDIX for 10/100 Mbps
  • RMII Rev. 1.2 and MII MAC Interface
  • 25-MHz MDC and MDIO Serial Management Interface
  • IEEE 802.3 100BASE-FX Fiber Interface
  • IEEE 1149.1 JTAG
  • Programmable LED Support for Link, 10/100 Mb/s
    Mode, Duplex, Activity, and Collision Detect
  • Optional 100BASE-TX Fast Link-loss Detection
  • Industrial Temperature Range
  • 48-pin LQFP Package (7 mm × 7 mm)
  • IEEE 1588 V1 and V2 Supported
  • UDP/IPv4, UDP/IPv6, and Layer2 Ethernet
    Packets Supported
  • IEEE 1588 Clock Synchronization
  • Timestamp Resolution of 8 ns
  • Allows Sub 10-ns Synchronization to Master
    Reference
  • 12 IEEE 1588 GPIOs for Trigger or Capture
  • Deterministic, Low Transmit and Receive Latency
  • Selectable Frequency Synchronized Clock Output
  • Dynamic Link Quality Monitoring
  • TDR Based Cable Diagnostic and Cable Length
    Detection
  • 10/100 Mb/s Packet BIST (Built-in Self Test)
  • Error-Free Operation up to 150 Meters CAT5
    Cable
  • ESD Protection – 8 kV Human Body Model
  • 2.5-V and 3.3-V I/Os and MAC Interface
  • Auto-MDIX for 10/100 Mbps
  • RMII Rev. 1.2 and MII MAC Interface
  • 25-MHz MDC and MDIO Serial Management Interface
  • IEEE 802.3 100BASE-FX Fiber Interface
  • IEEE 1149.1 JTAG
  • Programmable LED Support for Link, 10/100 Mb/s
    Mode, Duplex, Activity, and Collision Detect
  • Optional 100BASE-TX Fast Link-loss Detection
  • Industrial Temperature Range
  • 48-pin LQFP Package (7 mm × 7 mm)

The DP83640 Precision PHYTER™ device delivers the highest level of precision clock synchronization for real time industrial connectivity based on the IEEE 1588 standard. The DP83640 has deterministic, low latency and allows choice of microcontroller with no hardware customization required. The integrated 1588 functionality allows system designers the flexibility and precision of a close to the wire timestamp. The three key 1588 features supported by the device are:

  • Packet time stamps for clock synchronization
  • Integrated IEEE 1588 synchronized clock generation
  • Synchronized event triggering and time stamping through GPIO

DP83640 offers innovative diagnostic features unique to Texas Instruments, including dynamic monitoring of link quality during standard operation for fault prediction. These advanced features allow the system designer to implement a fault prediction mechanism to detect and warn of deteriorating and changing link conditions. This single port fast Ethernet transceiver can support both copper and fiber media.

The DP83640 Precision PHYTER™ device delivers the highest level of precision clock synchronization for real time industrial connectivity based on the IEEE 1588 standard. The DP83640 has deterministic, low latency and allows choice of microcontroller with no hardware customization required. The integrated 1588 functionality allows system designers the flexibility and precision of a close to the wire timestamp. The three key 1588 features supported by the device are:

  • Packet time stamps for clock synchronization
  • Integrated IEEE 1588 synchronized clock generation
  • Synchronized event triggering and time stamping through GPIO

DP83640 offers innovative diagnostic features unique to Texas Instruments, including dynamic monitoring of link quality during standard operation for fault prediction. These advanced features allow the system designer to implement a fault prediction mechanism to detect and warn of deteriorating and changing link conditions. This single port fast Ethernet transceiver can support both copper and fiber media.
filter 尋找其它 乙太網路 PHY
下載 觀看有字幕稿的影片 影片

技術文件

找不到結果。請清除您的搜尋條件，然後再試一次。
檢視所有 20
重要文件 類型 標題 格式選項 下載最新的英文版本 日期
* 資料表 DP83640 Precision PHYTER™ - IEEE 1588 Precision Time Protocol Transceiver datasheet (Rev. F) PDF | HTML 2015/4/30
應用說明 How to Pass IEEE Ethernet Compliance Tests PDF | HTML 2021/9/20
技術文章 SimpliPHY your Ethernet design, part 1: Ethernet PHY basics and selection process PDF | HTML 2020/3/11
應用說明 Selection and specification of crystals for Texas Instruments ethernet physical 2019/2/6
技術文章 How to achieve network synchronization clocks with TI digital PLLs PDF | HTML 2018/6/21
技術文章 How to implement IEEE 1588 time stamping in an Ethernet transceiver PDF | HTML 2016/9/28
技術文章 Fiber in industrial applications PDF | HTML 2016/4/21
應用說明 Reducing Radiated Emissions in Ethernet 10/100 LAN Applications (Rev. A) 2013/4/26
應用說明 Improving Electro-Magnetic Noise Immunity in Serial Communications Systems (Rev. A) 2013/4/26
應用說明 IEEE 1588 Boundary Clock and Transparent Clock Implementation Using the DP83640 (Rev. A) 2013/4/26
應用說明 IEEE 1588 Synchronization Over Standard Networks Using the DP83640 (Rev. A) 2013/4/26
應用說明 AN-1729 DP83640 IEEE 1588 PTP Synchronized Clock Output (Rev. D) 2013/4/26
應用說明 DP83640 Synchronous Ethernet Mode: Achieving Sub-ns Accuracy in PTP Applications (Rev. A) 2013/4/26
應用說明 AN-1540 Power Measurement of Ethernet Physical Layer Products (Rev. B) 2013/4/26
應用說明 AN-1794 Using RMII Master Mode (Rev. A) 2013/4/26
應用說明 AN-1469 PHYTER® Design & Layout Guide (Rev. D) 2013/4/26
應用說明 IEEE 1588 Precision Time Protocol Time Synchronization Performance (Rev. A) 2013/4/26
應用說明 AN-1548 PHYTER 100 Base-TX Reference Clock Jitter Tolerance (Rev. B) 2013/4/26
應用說明 AN-2006 Synchronizing a DP83640 PTP Master to a GPS Receiver (Rev. A) 2013/4/26
更多文件說明 EMC Test Report 2013/1/4

設計與開發

如需其他條款或必要資源，請按一下下方的任何標題以檢視詳細頁面 (如有)。

開發板

DP83640T-EVK — DP83640T 評估示範板

DP83640 basic product evaluation and customer demonstration board.

使用指南: PDF
支援產品和硬體
有庫存
限制：
??asset.out-of-stock-ti_zh_TW??
無法提供
驅動程式或資料庫

DP83640SW-LIB — DP83640 Software Design Guide and C Software Reference Library

支援產品和硬體
驅動程式或資料庫

ETHERNET-SW — 乙太網路 PHY 驅動程式和工具

德州儀器乙太網路實體層 (PHY) 收發器的驅動程式支援透過序列管理介面 (MDC/MDIO) 進行通訊，以配置及讀取 PHY 暫存器。如需 Linux 和 RTOS 驅動程式，請前往我們的 github。

 

支援產品和硬體
驅動程式或資料庫

SNLC036 — Software Design Guide and C Software Reference Library

支援產品和硬體
支援軟體

SNLC035 — Logic Vision Software Boundary Scan Cell

支援產品和硬體
支援軟體

USB-2-MDIO — USB-2-MDIO Tool v1.0

USB-2-MDIO 軟體工具可讓德州儀器的乙太網路 PHY 存取 MDIO 狀態和裝置控制暫存器。  USB-2-MDIO 工具包括 LaunchPad™ 開發套件，適用於與輕型 GUI 連接的 TI MSP430™ MCU。  LaunchPad 開發套件實作 MDIO 匯流排控制器，可處理連接匯流排之 PHY 上的暫存器。

支援產品和硬體
模擬型號

DP83640 BSDL Model

SNLM180.ZIP (1 KB) - BSDL 模型
支援產品和硬體
模擬型號

DP83640 IBIS Model

SNLM171.ZIP (15 KB) - IBIS 模型
支援產品和硬體
封裝 針腳 CAD 符號、佔位空間與 3D 模型
LQFP (PT) 48 Ultra Librarian
適用 TI 的評估品項標準條款與條件。

訂購與品質

建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。

支援與培訓

內含 TI 工程師技術支援的 TI E2E™ 論壇

以英文檢視所有論壇主題

內容係由 TI 和社群貢獻者依「現狀」提供，且不構成 TI 規範。檢視使用條款。

若有關於品質、封裝或訂購 TI 產品的問題，請參閱 TI 支援。​​​​​​​​​​​​​​

影片