DS80PCI810
- Low 70 mW/Channel (Typ) Power Consumption,
With Option to Power Down Unused Channels - Seamless Link Training Support
- Advanced Configurable Signal Conditioning I/O
- Receive CTLE up to ∼10 dB at 4 GHz
- Linear Output Driver
- Variable Output Voltage Range up to 1200
mVp-p
- Automatic Receiver Detect (Hot-Plug)
- Ultra-Low Input-to-Output Latency: 80 ps (Typ)
- Programmable via Pin Selection, EEPROM, or
SMBus Interface - Single Supply Voltage: 2.5 V or 3.3 V
- 4 kV HBM ESD Rating
- −40°C to 85°C Operating Temperature Range
- Flow-Thru Layout in 10 mm x 5.5 mm 54-Pin
Leadless WQFN Package - Pin Compatible with DS80PCI800
The DS80PCI810 is an extremely low-power high-performance repeater/redriver designed to support eight channels carrying high speed interface up to 8 Gbps, such as PCIe Gen-1, 2, and 3. The receiver’s continuous time linear equalizer (CTLE) provides high frequency boost that is programmable from 2.7 to 9.5 dB at 4 GHz (8 Gbps) followed by a linear output driver. The CTLE receiver is capable of opening an input eye that is completely closed due to inter symbol interference (ISI) induced by interconnect medium such as board traces or twin axial-copper cables. The programmable equalization maximizes the flexibility of physical placement within the interconnect channel and improves overall channel performance.
When operating in PCIe applications, the DS80PCI810 preserves transmit signal characteristics, thereby allowing the host controller and the end point to negotiate transmit equalizer coefficients. This transparency in the link training protocol facilitates system level interoperability and minimizes latency.
The programmable settings can be applied easily via pin control, software (SMBus or I2C), or direct loading from an external EEPROM. In EEPROM mode, the configuration information is automatically loaded on power up, thereby eliminating the need for an external microprocessor or software driver.
您可能會感興趣的類似產品
功能相同，但針腳輸出與所比較的裝置不同。
技術文件
| 重要文件 | 類型 | 標題 | 格式選項 | 下載最新的英文版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 資料表 | DS80PCI810 Low-Power 8 Gbps 8-Channel Linear Repeater datasheet (Rev. A) | PDF | HTML | 2015/2/6 | ||
| 技術文章 | NVME and PCI Express: What’s the difference? | PDF | HTML | 2015/8/11 | |||
| 技術文章 | Differential pairs: four things you need to know about vias | PDF | HTML | 2015/6/10 | |||
| 技術文章 | Differential pairs: what you really need to know | PDF | HTML | 2015/5/5 | |||
| 類比設計期刊 | Analog Applications Journal 2Q 2015 | 2015/4/28 | ||||
| 類比設計期刊 | Advanced linear equalization in multi-gigabit systems | 2015/4/28 | ||||
| 應用說明 | Channel Tuning Made Easy Using Linear Repeaters for 10G and 12G Applications | 2015/1/20 | ||||
| 應用說明 | Understanding EEPROM Programming for High Speed Repeaters and Mux Buffers | 2014/10/9 | ||||
| 應用說明 | Advanced Linear Repeater Used in PCIe 3.0 Add-in Card Compliance Environment | 2014/10/2 |
設計與開發
如需其他條款或必要資源，請按一下下方的任何標題以檢視詳細頁面 (如有)。
DS80PCI810EVM — DS80PCI810 評估模組
DS80PCI810EVM – SMA 評估套件提供完整的高頻寬平台，可評估德州儀器 DS80PCI810 中繼器/再驅動器的 PCIe 訊號調整功能。DS80PCI810EVM 可用於標準合規測試、性能評估和初始系統原型設計。 用於 DS80PCI810EVM 的 SMA 邊緣啟動連接器，可透過市售分接纜線、轉接器及電路板（未隨附），介接多種系統連接器類型。這種彈性的連線方式可在 TI 中繼器與第三方 ASIC/FPGA 主機板之間，實現整合式系統層級測試。
SIGCONARCHITECT-WRTE — SigCon Architect With RTE v2.0.0.8
TIDA-00423 — 適用於 PCIe Gen-3 卡的高速前端參考設計
此經驗證參考設計為 PCIe Gen-3 高速前端卡設計，可延長 PCIe 子系統的 PCB 走線距離。此電路板的設計可安裝在主機板和 PCIe Gen3 附加介面卡之間的 x16 通道寬度 PCIe Gen-3 槽中。此參考設計為使用者提供了實用的指南，可將 DS80PCI810 中繼器整合至 PCIe Root Complex ASIC 以及自己的附加介面卡設計。
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| WQFN (NJY) | 54 | Ultra Librarian |
訂購與品質
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。