DS90C031QML
- Radiation guaranteed 100 krad(Si)
- High impedance LVDS outputs with power-off
- ±350 mV differential signaling
- Low power dissipation
- Low differential skew
- Low propagation delay
- Pin compatible with DS26C31
- Compatible with IEEE 1596.3 SCI LVDS standard
- Compatible with proposed TIA LVDS standard
- Fail safe logic for floating inputs
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The DS90C031 is a quad CMOS differential line driver designed for applications requiring ultra low power dissipation and high data rates.
The DS90C031 accepts TTL/CMOS input levels and translates them to low voltage (350 mV) differential output signals. In addition the driver supports a TRI-STATE function that may be used to disable the output stage, thus dropping the device to a low idle power state of 11 mW typical.
In addition, the DS90C031 provides power-off high impedance LVDS outputs. This feature assures minimal loading effect on the LVDS bus lines when VCC is not present. The DS90C031 and companion line receiver (DS90C032) provide a new alternative to high power psuedo-ECL devices for high speed point-to-point interface applications.
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技術文件
| 重要文件 | 類型 | 標題 | 格式選項 | 下載最新的英文版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 資料表 | DS90C031QML LVDS Quad CMOS Differential Line Driver datasheet (Rev. B) | 2013/3/4 | |||
| * | 輻射及可靠性報告 | DS90C031xRQMLV TID Report | 2012/5/9 | |||
| * | 輻射及可靠性報告 | DS90C031xRQMLV SEE Report | 2012/5/9 | |||
| * | SMD | DS90C031QML SMD 5962-95833 | 2016/6/21 | |||
| Application brief | How Far, How Fast Can You Operate LVDS Drivers and Receivers? | 2018/8/3 | ||||
| Application brief | How to Terminate LVDS Connections with DC and AC Coupling | 2018/5/16 | ||||
| 應用說明 | AN-1110 LVDS Quad Dynamic I CC vs Frequency | 2004/5/15 |
設計與開發
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| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| LCCC (NAJ) | 20 | Ultra Librarian |
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