DS90LV032AQML-SP

現行

3-V LVDS 四 CMOS 差動線路接收器

產品詳細資料

Function Receiver Protocols LVDS Number of transmitters 0 Number of receivers 4 Supply voltage (V) 3.3 Signaling rate (MBits) 400 Input signal LVDS Output signal LVTTL Rating Space Operating temperature range (°C) -55 to 85
Function Receiver Protocols LVDS Number of transmitters 0 Number of receivers 4 Supply voltage (V) 3.3 Signaling rate (MBits) 400 Input signal LVDS Output signal LVTTL Rating Space Operating temperature range (°C) -55 to 85
CFP (NAD) 16 62.9285 mm² 9.91 x 6.35
  • Low chip to chip skew
  • Low differential skew
  • High impedance LVDS inputs with power-off
  • Low power dissipation
  • Accepts small swing (330 mV) differential signal levels.
  • Compatible with ANSI/TIA/EIA-644
  • Operating temperature range (-55°C to +85°C)
  • Pin compatible with DS90C032A and DS26C32A.
  • Typical Rise/Fall time is 350pS.

All trademarks are the property of their respective owners.

  • Low chip to chip skew
  • Low differential skew
  • High impedance LVDS inputs with power-off
  • Low power dissipation
  • Accepts small swing (330 mV) differential signal levels.
  • Compatible with ANSI/TIA/EIA-644
  • Operating temperature range (-55°C to +85°C)
  • Pin compatible with DS90C032A and DS26C32A.
  • Typical Rise/Fall time is 350pS.

All trademarks are the property of their respective owners.

The DS90LV032A is a quad CMOS differential line receiver designed for applications requiring ultra low power dissipation and high data rates.

The DS90LV032A accepts low voltage (350 mV typical) differential input signals and translates them to 3V CMOS output levels. The receiver supports a TRI-STATE function that may be used to multiplex outputs.

The DS90LV032A and companion LVDS line driver (eg. DS90LV031A) provide a new alternative to high power PECL/ECL devices for high speed point-to-point interface applications.

In addition, the DS90LV032A provides power-off high impedance LVDS inputs. This feature assures minimal loading effect on the LVDS bus lines when VCC is not present.

The DS90LV032A is a quad CMOS differential line receiver designed for applications requiring ultra low power dissipation and high data rates.

The DS90LV032A accepts low voltage (350 mV typical) differential input signals and translates them to 3V CMOS output levels. The receiver supports a TRI-STATE function that may be used to multiplex outputs.

The DS90LV032A and companion LVDS line driver (eg. DS90LV031A) provide a new alternative to high power PECL/ECL devices for high speed point-to-point interface applications.

In addition, the DS90LV032A provides power-off high impedance LVDS inputs. This feature assures minimal loading effect on the LVDS bus lines when VCC is not present.

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類型 標題 日期
* Data sheet DS90LV032AQML 3V LVDS Quad CMOS Differential Line Receiver datasheet (Rev. A) 2013年 4月 16日
Application brief DLA Approved Optimizations for QML Products (Rev. A) PDF | HTML 2024年 6月 5日
Selection guide TI Space Products (Rev. J) 2024年 2月 12日
More literature TI Engineering Evaluation Units vs. MIL-PRF-38535 QML Class V Processing (Rev. A) 2023年 8月 31日
Application note Heavy Ion Orbital Environment Single-Event Effects Estimations (Rev. A) PDF | HTML 2022年 11月 17日
Application note Single-Event Effects Confidence Interval Calculations (Rev. A) PDF | HTML 2022年 10月 19日
Application brief How Far, How Fast Can You Operate LVDS Drivers and Receivers? 2018年 8月 3日
Application brief How to Terminate LVDS Connections with DC and AC Coupling 2018年 5月 16日
More literature Die D/S DS90LV032 MDS 3V LVDS Quad Cmos Differential Line Receiver 2012年 9月 7日

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開發板

DS90LV047-48AEVM — DS90LV047-48AEVM 評估模組

The DS90LV047-48AEVM is an evaluation module (EVM) designed for performance and functional evaluation of Texas Instruments' DS90LV047A 3-V LVDS quad CMOS differential line driver and DS90LV048A 3-V LVDS CMOS differential line receiver. With this kit, users can quickly evaluate the output (...)
使用指南: PDF
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DS90LV032A IBIS Model

SNLM021.ZIP (12 KB) - IBIS Model
模擬工具

PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
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TINA-TI — 基於 SPICE 的類比模擬程式

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
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CFP (NAD) 16 Ultra Librarian

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