DS90LV032AQML

現行

3-V LVDS 四 CMOS 差動線路接收器

產品詳細資料

Function Receiver Protocols ECL, LVDS, PECL Number of transmitters 0 Number of receivers 4 Supply voltage (V) 3.3 Signaling rate (Mbps) 400 Input signal LVDS Output signal LVTTL Rating Military Operating temperature range (°C) -55 to 85
Function Receiver Protocols ECL, LVDS, PECL Number of transmitters 0 Number of receivers 4 Supply voltage (V) 3.3 Signaling rate (Mbps) 400 Input signal LVDS Output signal LVTTL Rating Military Operating temperature range (°C) -55 to 85
CFP (NAD) 16 62.9285 mm² 9.91 x 6.35
  • Low chip to chip skew
  • Low differential skew
  • High impedance LVDS inputs with power-off
  • Low power dissipation
  • Accepts small swing (330 mV) differential signal levels.
  • Compatible with ANSI/TIA/EIA-644
  • Operating temperature range (-55°C to +85°C)
  • Pin compatible with DS90C032A and DS26C32A.
  • Typical Rise/Fall time is 350pS.

All trademarks are the property of their respective owners.

  • Low chip to chip skew
  • Low differential skew
  • High impedance LVDS inputs with power-off
  • Low power dissipation
  • Accepts small swing (330 mV) differential signal levels.
  • Compatible with ANSI/TIA/EIA-644
  • Operating temperature range (-55°C to +85°C)
  • Pin compatible with DS90C032A and DS26C32A.
  • Typical Rise/Fall time is 350pS.

All trademarks are the property of their respective owners.

The DS90LV032A is a quad CMOS differential line receiver designed for applications requiring ultra low power dissipation and high data rates.

The DS90LV032A accepts low voltage (350 mV typical) differential input signals and translates them to 3V CMOS output levels. The receiver supports a TRI-STATE function that may be used to multiplex outputs.

The DS90LV032A and companion LVDS line driver (eg. DS90LV031A) provide a new alternative to high power PECL/ECL devices for high speed point-to-point interface applications.

In addition, the DS90LV032A provides power-off high impedance LVDS inputs. This feature assures minimal loading effect on the LVDS bus lines when VCC is not present.

The DS90LV032A is a quad CMOS differential line receiver designed for applications requiring ultra low power dissipation and high data rates.

The DS90LV032A accepts low voltage (350 mV typical) differential input signals and translates them to 3V CMOS output levels. The receiver supports a TRI-STATE function that may be used to multiplex outputs.

The DS90LV032A and companion LVDS line driver (eg. DS90LV031A) provide a new alternative to high power PECL/ECL devices for high speed point-to-point interface applications.

In addition, the DS90LV032A provides power-off high impedance LVDS inputs. This feature assures minimal loading effect on the LVDS bus lines when VCC is not present.

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類型 標題 日期
* Data sheet DS90LV032AQML 3V LVDS Quad CMOS Differential Line Receiver datasheet (Rev. A) 2013年 4月 16日
* SMD DS90LV032AQML SMD 5962-98652 2016年 6月 21日
Application brief How Far, How Fast Can You Operate LVDS Drivers and Receivers? 2018年 8月 3日
Application brief How to Terminate LVDS Connections with DC and AC Coupling 2018年 5月 16日
More literature Die D/S DS90LV032 MDS 3V LVDS Quad Cmos Differential Line Receiver 2012年 9月 7日

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DS90LV047-48AEVM — DS90LV047-48AEVM 評估模組

DS90LV047-48AEVM 評估模組 (EVM) 專為德州儀器 DS90LV047A 3-V LVDS 四通道 CMOS 差動線路驅動器和 DS90LV048A 3-V LVDS CMOS 差動線路接收器的性能與功能評估而設計。使用者可運用此套件快速評估 DS90LV047A 和 DS90LV048A 支援的輸出波形特性和訊號完整性。接頭針腳可連接至 DS90LV047A 和 DS90LV048A 輸入及輸出,也便於連接至實驗室設備或使用者系統,以進行性能評估。
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DS90LV032A IBIS Model

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