DS90LV047A
- >400-Mbps (200 MHz) Switching Rates
- Flow-Through Pinout Simplifies PCB Layout
- 300-ps Typical Differential Skew
- 400-ps Maximum Differential Skew
- 1.7-ns Maximum Propagation Delay
- 3.3-V Power Supply Design
- ±350-mV Differential Signaling
- Low Power Dissipation (13 mW at 3.3-V Static)
- Interoperable With Existing 5-V LVDS Receivers
- High impedance on LVDS Outputs on Power Down
- Conforms to TIA/EIA-644 LVDS Standard
- Industrial Operating Temperature Range (–40°C to +85°C)
- Available in Surface Mount SOIC and Low Profile TSSOP Package
The DS90LV047A device is a quad CMOS flow-through differential line driver designed for applications requiring ultra-low power dissipation and high data rates. The device is designed to support data rates in excess of 400 Mbps (200 MHz) using Low Voltage Differential Signaling (LVDS) technology.
The DS90LV047A accepts low voltage TTL/CMOS input levels and translates them to low voltage (350 mV) differential output signals. In addition, the driver supports a TRI-STATE function that may be used to disable the output stage, disabling the load current, and thus dropping the device to an ultra low idle power state of 13 mW typical. The DS90LV047A has a flow-through pinout for easy PCB layout.
The EN and EN∗ inputs are ANDed together and control the TRI-STATE outputs. The enables are common to all four drivers. The DS90LV047A and companion line receiver (DS90LV048A) provide a new alternative to high power psuedo-ECL devices for high speed point-to-point interface applications.
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技術文件
| 重要文件 | 類型 | 標題 | 格式選項 | 下載最新的英文版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 資料表 | DS90LV047A 3-V LVDS Quad CMOS Differential Line Driver datasheet (Rev. D) | PDF | HTML | 2016/7/29 | ||
| 應用說明 | Applications of Low-Voltage Differential Signaling (LVDS) in LED Walls | 2020/10/29 | ||||
| 應用說明 | Applications of Low-Voltage Differential Signaling (LVDS) in Ultrasound Scanners | 2019/6/29 | ||||
| Application brief | LVDS to Improve EMC in Motor Drives | 2018/9/27 | ||||
| Application brief | How Far, How Fast Can You Operate LVDS Drivers and Receivers? | 2018/8/3 | ||||
| Application brief | How to Terminate LVDS Connections with DC and AC Coupling | 2018/5/16 | ||||
| 應用說明 | An Overview of LVDS Technology | 1998/10/5 |
設計與開發
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DS90LV047-48AEVM — DS90LV047-48AEVM 評估模組
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| SOIC (D) | 16 | Ultra Librarian |
| TSSOP (PW) | 16 | Ultra Librarian |
訂購與品質
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