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LVDS、M-LVDS 和 PECL IC

DS90LV048A

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產品規格表

DS90LV048A

現行
產品規格表 立即訂購

產品詳細資料

Function Receiver Protocols LVDS Number of transmitters 0 Number of receivers 4 Signaling rate (Mbps) 400 Input signal LVDS Output signal LVTTL, TTL Rating Catalog Operating temperature range (°C) -40 to 85
Function Receiver Protocols LVDS Number of transmitters 0 Number of receivers 4 Signaling rate (Mbps) 400 Input signal LVDS Output signal LVTTL, TTL Rating Catalog Operating temperature range (°C) -40 to 85
TSSOP (PW) 16 32 mm² (5 mm × 6.4 mm) SOIC (D) 16 59.4 mm² (9.9 mm × 6 mm)
  • > 400-Mbps (200-MHz) Switching Rates
  • Flow-Through Pinout Simplifies PCB Layout
  • 150-ps Channel-to-Channel Skew (Typical)
  • 100-ps Differential Skew (Typical)
  • 2.7-ns Maximum Propagation Delay
  • 3.3-V Power Supply Design
  • High Impedance LVDS Inputs on Power Down
  • Low Power Design (40 mW at 3.3-V Static)
  • Interoperable With Existing 5-V LVDS Drivers
  • Accepts Small Swing (350 mV Typical) Differential Signal Levels
  • Supports Input Failsafe
    • Open, Short, and Terminated
  • 0 V to –100 mV Threshold Region
  • Conforms to ANSI/TIA/EIA-644 Standard
  • Operating Temperature Range: –40°C to +85°C
  • Available in SOIC and TSSOP Package
  • > 400-Mbps (200-MHz) Switching Rates
  • Flow-Through Pinout Simplifies PCB Layout
  • 150-ps Channel-to-Channel Skew (Typical)
  • 100-ps Differential Skew (Typical)
  • 2.7-ns Maximum Propagation Delay
  • 3.3-V Power Supply Design
  • High Impedance LVDS Inputs on Power Down
  • Low Power Design (40 mW at 3.3-V Static)
  • Interoperable With Existing 5-V LVDS Drivers
  • Accepts Small Swing (350 mV Typical) Differential Signal Levels
  • Supports Input Failsafe
    • Open, Short, and Terminated
  • 0 V to –100 mV Threshold Region
  • Conforms to ANSI/TIA/EIA-644 Standard
  • Operating Temperature Range: –40°C to +85°C
  • Available in SOIC and TSSOP Package

The DS90LV048A device is a quad CMOS flow-through differential line receiver designed for applications requiring ultra-low power dissipation and high data rates. The device is designed to support data rates in excess of 400 Mbps (200 MHz) using Low Voltage Differential Signaling (LVDS) technology.

The DS90LV048A accepts low voltage (350 mV typical) differential input signals and translates them to 3-V CMOS output levels. The receiver supports a TRI-STATE function that may be used to multiplex outputs. The receiver also supports open, shorted, and terminated (100-Ω) input fail-safe. The receiver output is HIGH for all fail-safe conditions. The DS90LV048A has a flow-through pinout for easy PCB layout.

The EN and EN∗ inputs are ANDed together and control the TRI-STATE outputs. The enables are common to all four receivers. The DS90LV048A and companion LVDS line driver (for example, DS90LV047A) provide a new alternative to high-power PECL/ECL devices for high-speed point-to-point interface applications.

The DS90LV048A device is a quad CMOS flow-through differential line receiver designed for applications requiring ultra-low power dissipation and high data rates. The device is designed to support data rates in excess of 400 Mbps (200 MHz) using Low Voltage Differential Signaling (LVDS) technology.

The DS90LV048A accepts low voltage (350 mV typical) differential input signals and translates them to 3-V CMOS output levels. The receiver supports a TRI-STATE function that may be used to multiplex outputs. The receiver also supports open, shorted, and terminated (100-Ω) input fail-safe. The receiver output is HIGH for all fail-safe conditions. The DS90LV048A has a flow-through pinout for easy PCB layout.

The EN and EN∗ inputs are ANDed together and control the TRI-STATE outputs. The enables are common to all four receivers. The DS90LV048A and companion LVDS line driver (for example, DS90LV047A) provide a new alternative to high-power PECL/ECL devices for high-speed point-to-point interface applications.
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DS90LV047A 現行 400-Mbps LVDS 四高速差動驅動器 Driver variant

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重要文件 類型 標題 格式選項 下載最新的英文版本 日期
* 資料表 DS90LV048A 3-V LVDS Quad CMOS Differential Line Receiver datasheet (Rev. C) PDF | HTML 2016/7/29
應用說明 Applications of Low-Voltage Differential Signaling (LVDS) in LED Walls 2020/10/29
應用說明 Applications of Low-Voltage Differential Signaling (LVDS) in Ultrasound Scanners 2019/6/29
Application brief LVDS to Improve EMC in Motor Drives 2018/9/27
Application brief How Far, How Fast Can You Operate LVDS Drivers and Receivers? 2018/8/3
Application brief How to Terminate LVDS Connections with DC and AC Coupling 2018/5/16
應用說明 An Overview of LVDS Technology 1998/10/5

設計與開發

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開發板

DS90LV047-48AEVM — DS90LV047-48AEVM 評估模組

DS90LV047-48AEVM 評估模組 (EVM) 專為德州儀器 DS90LV047A 3-V LVDS 四通道 CMOS 差動線路驅動器和 DS90LV048A 3-V LVDS CMOS 差動線路接收器的性能與功能評估而設計。使用者可運用此套件快速評估 DS90LV047A 和 DS90LV048A 支援的輸出波形特性和訊號完整性。接頭針腳可連接至 DS90LV047A 和 DS90LV048A 輸入及輸出，也便於連接至實驗室設備或使用者系統，以進行性能評估。
使用指南: PDF
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模擬型號

DS90LV048A IBIS Model

SNLM165.ZIP (8 KB) - IBIS 模型
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封裝 針腳 CAD 符號、佔位空間與 3D 模型
TSSOP (PW) 16 Ultra Librarian
SOIC (D) 16 Ultra Librarian
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