DS90LVRA2

現行

1.8V 600Mbps LVDS 雙差動線路接收器

產品詳細資料

Function Receiver Protocols LVDS Number of transmitters 0 Number of receivers 2 Signaling rate (Mbps) 600 Input signal LVDS Output signal CMOS, LVCMOS, LVTTL, TTL Rating Catalog Operating temperature range (°C) -40 to 85
Function Receiver Protocols LVDS Number of transmitters 0 Number of receivers 2 Signaling rate (Mbps) 600 Input signal LVDS Output signal CMOS, LVCMOS, LVTTL, TTL Rating Catalog Operating temperature range (°C) -40 to 85
WSON (DEM) 8 4 mm² (2 mm × 2 mm)
  • 600 Mbps (300 MHz) switching rates
  • 50 ps differential skew (typical)
  • 0.1 ns channel-to-channel skew (typical)
  • 1.8 V power supply
  • Flow-through pinout
  • Power down high impedance on LVDS inputs
  • Output slew rate control
  • LVDS inputs accept LVDS/CML/LVPECL signals
  • Conforms to ANSI/TIA/EIA-644 standard
  • Pin compatible with DS90LV028A-Q1
  • OPN variants
    • Standard: 0°C to 70°C
    • Industrial: -40°C to +85°C
  • 600 Mbps (300 MHz) switching rates
  • 50 ps differential skew (typical)
  • 0.1 ns channel-to-channel skew (typical)
  • 1.8 V power supply
  • Flow-through pinout
  • Power down high impedance on LVDS inputs
  • Output slew rate control
  • LVDS inputs accept LVDS/CML/LVPECL signals
  • Conforms to ANSI/TIA/EIA-644 standard
  • Pin compatible with DS90LV028A-Q1
  • OPN variants
    • Standard: 0°C to 70°C
    • Industrial: -40°C to +85°C

The DS90LVRA2 is a dual CMOS differential line receiver designed for applications requiring high input common mode range, high data rates and CMOS output with slew rate control. The device is designed to support data rates of 600 Mbps (300 MHz) utilizing Low Voltage Differential Signaling (LVDS) technology.

The DS90LVRA2 accepts low voltage (350 mV typical) differential input signals and translates them to 1.8 V CMOS output levels depending on power supply voltage. The DS90LVRA2 has a flow-through design for easy PCB layout.

The DS90LVRA2 and companion LVDS line driver DS90LV027AQ provide a new alternative to high power PECL/ECL devices for high speed point-to-point interface applications.

The DS90LVRA2 is a dual CMOS differential line receiver designed for applications requiring high input common mode range, high data rates and CMOS output with slew rate control. The device is designed to support data rates of 600 Mbps (300 MHz) utilizing Low Voltage Differential Signaling (LVDS) technology.

The DS90LVRA2 accepts low voltage (350 mV typical) differential input signals and translates them to 1.8 V CMOS output levels depending on power supply voltage. The DS90LVRA2 has a flow-through design for easy PCB layout.

The DS90LVRA2 and companion LVDS line driver DS90LV027AQ provide a new alternative to high power PECL/ECL devices for high speed point-to-point interface applications.

下載 觀看有字幕稿的影片 影片

您可能會感興趣的類似產品

open-in-new 比較替代產品
具備升級功能,可直接投入使用替代所比較的裝置。
DS90LVRA2-Q1 現行 車用、1.8V 至 3.6V、600Mbps LVDS 雙差動線路接收器 Automotive grade

技術文件

找不到結果。請清除您的搜尋條件,然後再試一次。
檢視所有 4
重要文件 類型 標題 格式選項 下載最新的英文版本 日期
* 資料表 DS90LVRA2 LVDS Dual Differential Line Receiver datasheet PDF | HTML 2022/12/19
Application brief Level Shift No More: Support Low Voltage I/O Signals into a FPGA, Processor, or ASIC (Rev. A) PDF | HTML 2024/8/15
Application brief Enabling LVDS Links for Low Power FPGAs, Processors, and ASIC Implementations (Rev. A) PDF | HTML 2024/3/25
證書 DS90LVRA2EVM EU RoHS Declaration of Conformity (DoC) 2022/11/17

設計與開發

如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。

開發板

DS90LVRA2EVM — 適用雙通道 LVDS 接收器的 DS90LVRA2 評估模組

DS90LVRA2 評估模組 (EVM) 是用於評估 DS90LVRA2 LVDS 雙差動線路接收器性能和功能的平台。

使用者可運用此 EVM 快速評估 DS90LVRA2 支援的輸出波形特性和訊號完整性。SMA 允許存取 DS90LVRA2 輸入和輸出,也可幫助與實驗室設備或使用者系統的連接,以進行性能評估。

使用指南: PDF | HTML
支援產品和硬體
有庫存
限制:
??asset.out-of-stock-ti_zh_TW??
無法提供
封裝 針腳 CAD 符號、佔位空間與 3D 模型
WSON (DEM) 8 Ultra Librarian

訂購與品質

建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。

支援與培訓

內含 TI 工程師技術支援的 TI E2E™ 論壇

內容係由 TI 和社群貢獻者依「現狀」提供,且不構成 TI 規範。檢視使用條款

若有關於品質、封裝或訂購 TI 產品的問題,請參閱 TI 支援。​​​​​​​​​​​​​​

影片