LMX2572
- Output frequency: 12.5 MHz to 6.4 GHz
- Low power consumption: 75 mA at 3.3-V supply
- –106-dBc/Hz Phase noise at 100-kHz offset with 6.4-GHz carrier
- PLL figure of merit: –232 dBc/Hz
- PLL normalized 1/f noise: –123.5 dBc/Hz
- 32-Bit Fractional-N divider
- Remove integer boundary spurs with programmable input multiplier
- Synchronization of output phase across multiple devices
- Support for JESD204B SYSREF with programmable delay
- Support for ramp and chirp functions
- Support for FSK direct digital modulation
- Two programmable output power level differential outputs
- Fast VCO calibration speed: < 20 µs
- Single 3-V to 3.5-V power supply
The LMX2572 is a low-power, high-performance wideband synthesizer that can generate any frequency from 12.5 MHz to 6.4 GHz without using an internal doubler. The PLL delivers excellent performance while consuming just 75 mA from a single 3.3-V supply.
For applications like digital mobile radio (DMR) and wireless microphones, the LMX2572 supports FSK modulation. Discrete level FSK and pulse-shaping FSK are supported. Direct digital FSK modulation is achievable through programming or pins.
The LMX2572 allows users to synchronize the output of multiple devices and also enables applications that need deterministic delay between input and output. The LMX2572 provides an option to adjust the phase with fine granularity to account for delay mismatch on the board or within devices. A frequency ramp generator can synthesize up to two segments of ramp in an automatic ramp generation option or a manual option for maximum flexibility. The fast calibration algorithm allows the user to change frequencies faster than 20 µs. The LMX2572 also supports generating or repeating SYSREF (compliant to JESD204B standard) making it an ideal low-power, low-noise clock source for clocking high-speed data converters. Fine delay adjustment is provided in this configuration to account for delay differences of board traces.
The LMX2572 integrates LDOs from a single 3.3-V supply, thus eliminating the need for onboard low-noise LDOs.
技術文件
| 重要文件 | 類型 | 標題 | 格式選項 | 下載最新的英文版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 資料表 | LMX2572 6.4-GHz Low power wideband RF synthesizer with phase synchronization and JESD204B support datasheet (Rev. B) | PDF | HTML | 2019/1/29 | ||
| 應用說明 | Leveraging TI’s Clock Tools For Converter Designs | PDF | HTML | 2026/4/20 | |||
| 應用說明 | Practical Clocking Considerations That Give Your Next High-Speed Converter Design an Edge (Rev. A) | PDF | HTML | 2025/4/11 | |||
| Application brief | Compilation of RF Synthesizer Resources | PDF | HTML | 2024/10/22 | |||
| 應用說明 | Sine to Square Wave Conversion Using Clock Buffers | PDF | HTML | 2024/9/3 | |||
| Circuit design | MASH_SEED Optimization and Impact on Spurs (LMX2820) | PDF | HTML | 2024/8/8 | |||
| 應用說明 | Achieving Low Frequency Switchover Time for Wireless Infrastructure Applications | 2018/11/28 | ||||
| 應用說明 | LMX2571 Using a Programmable Input Multiplier to Minimize Integer Boundary Spurs | PDF | HTML | 2016/1/12 |
設計與開發
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| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| VQFN (RHA) | 40 | Ultra Librarian |
訂購與品質
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。