LMX2595
- 10-MHz to 20-GHz output frequency
- –110 dBc/Hz phase noise at 100-kHz offset with 15-GHz carrier
- 45-fs rms jitter at 7.5 GHz (100 Hz to 100 MHz)
- Programmable output power
- PLL key
specifications
- Figure of merit: –236 dBc/Hz
- Normalized 1/f noise: –129 dBc/Hz
- High phase detector frequency
- 400-MHz integer mode
- 300-MHz fractional mode
- 32-bit fractional-N divider
- Remove integer boundary spurs with programmable input multiplier
- Synchronization of output phase across multiple devices
- Support for SYSREF with 9-ps resolution programmable delay
- Frequency ramp and chirp generation ability for FMCW applications
- < 20-µs VCO calibration speed
- 3.3-V single power supply operation
The LMX2595 high-performance, wideband synthesizer that can generate any frequency from 10 MHz to 20 GHz. An integrated doubler is used for frequencies above 15 GHz. The high-performance PLL with figure of merit of –236 dBc/Hz and high-phase detector frequency can attain very low in-band noise and integrated jitter. The high-speed N-divider has no pre-divider, thus significantly reducing the amplitude and number of spurs. There is also a programmable input multiplier to mitigate integer boundary spurs.
The LMX2595 allows users to synchronize the output of multiple devices and also enables applications that need deterministic delay between input and output. A frequency ramp generator can synthesize up to two segments of ramp in an automatic ramp generation option or a manual option for maximum flexibility. The fast calibration algorithm allows changing frequencies faster than 20 µs. The LMX2595 adds support for generating or repeating SYSREF (compliant to JESD204B standard) designed for low-noise clock sources in high-speed data converters. A fine delay adjustment (9-ps resolution) is provided in this configuration to account for delay differences of board traces.
The output drivers within LMX2595 deliver output power as high as 7 dBm at 15-GHz carrier frequency. The device runs from a single 3.3-V supply and has integrated LDOs that eliminate the need for on-board low noise LDOs.
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技術文件
| 重要文件 | 類型 | 標題 | 格式選項 | 下載最新的英文版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 資料表 | LMX2595 20-GHz Wideband PLLATINUM™ RF Synthesizer With Phase Synchronization and JESD204B Support datasheet (Rev. C) | PDF | HTML | 2019/4/16 | ||
| 應用說明 | Practical Clocking Considerations That Give Your Next High-Speed Converter Design an Edge (Rev. A) | PDF | HTML | 2025/4/11 | |||
| Application brief | Compilation of RF Synthesizer Resources | PDF | HTML | 2024/10/22 | |||
| 應用說明 | Sine to Square Wave Conversion Using Clock Buffers | PDF | HTML | 2024/9/3 | |||
| Circuit design | MASH_SEED Optimization and Impact on Spurs (LMX2820) | PDF | HTML | 2024/8/8 | |||
| 應用說明 | Streamline RF Synthesizer VCO Calibration and Optimize PLL Lock Time (Rev. A) | 2021/8/27 |
設計與開發
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| VQFN (RHA) | 40 | Ultra Librarian |
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