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RF PLL 與合成器

LMX2615-SP

現行

Radiation-hardened, QML-V, 40MHz to 15GHz synthesizer with synchronization and JESD204B support

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產品規格表

LMX2615-SP

現行
產品規格表 立即訂購

產品詳細資料

Frequency (max) (MHz) 15000 Frequency (min) (MHz) 40 Normalized PLL phase noise (dBc/Hz) -236 1/f noise (10-kHz offset at 1-GHz carrier) (dBc/Hz) -129 Features Phase synchronization, Programmable output power, SYSREF support (Compliant to JESD204B standard), Space grade Current consumption (mA) 360 Integrated VCO Yes Operating temperature range (°C) -55 to 125 Rating Space Lock time (µs) (typ) (s) Loop BW dependent
Frequency (max) (MHz) 15000 Frequency (min) (MHz) 40 Normalized PLL phase noise (dBc/Hz) -236 1/f noise (10-kHz offset at 1-GHz carrier) (dBc/Hz) -129 Features Phase synchronization, Programmable output power, SYSREF support (Compliant to JESD204B standard), Space grade Current consumption (mA) 360 Integrated VCO Yes Operating temperature range (°C) -55 to 125 Rating Space Lock time (µs) (typ) (s) Loop BW dependent
CFP (HBD) 64 400 mm² (20 mm × 20 mm)
  • Radiation specifications:
  • 40MHz to 15.2GHz output frequency
  • –110dBc/Hz phase noise at 100kHz offset with 15GHz carrier
  • 45fs RMS jitter at 8GHz (100Hz to 100MHz)
  • Programmable output power
  • PLL key specifications:
    • Figure of merit: –236dBc/Hz
    • Normalized 1/f noise: –129dBc/Hz
    • Up to 200MHz phase detector frequency
  • Synchronization of output phase across multiple devices
  • Support for SYSREF with programmable delay
  • 3.3V single power supply operation
  • 71 pre-selected pin modes
  • 11 × 11mm² 64-lead CQFP ceramic package
  • Operating temperature range: –55°C to +125°C
  • Radiation specifications:
  • 40MHz to 15.2GHz output frequency
  • –110dBc/Hz phase noise at 100kHz offset with 15GHz carrier
  • 45fs RMS jitter at 8GHz (100Hz to 100MHz)
  • Programmable output power
  • PLL key specifications:
    • Figure of merit: –236dBc/Hz
    • Normalized 1/f noise: –129dBc/Hz
    • Up to 200MHz phase detector frequency
  • Synchronization of output phase across multiple devices
  • Support for SYSREF with programmable delay
  • 3.3V single power supply operation
  • 71 pre-selected pin modes
  • 11 × 11mm² 64-lead CQFP ceramic package
  • Operating temperature range: –55°C to +125°C

The LMX2615-SP is a high performance wideband phase-locked loop (PLL) with integrated voltage controlled oscillator (VCO) and voltage regulators that can output any frequency from 40MHz and 15.2GHz without a doubler, which eliminates the need for ½ harmonic filters. The VCO on this device covers an entire octave so the frequency coverage is complete down to 40MHz. The high performance PLL with a figure of merit of –236dBc/Hz and high phase detector frequency can attain very low in-band noise and integrated jitter.

The LMX2615-SP allows users to synchronize the output of multiple instances of the device. This means that deterministic phase can be obtained from a device in any use case including the one with fractional engine or output divider enabled. The device also adds support for either generating or repeating SYSREF (compliant to JESD204B standard), making the device designed low-noise clock source for high-speed data converters.

The LMX2615-SP is a high performance wideband phase-locked loop (PLL) with integrated voltage controlled oscillator (VCO) and voltage regulators that can output any frequency from 40MHz and 15.2GHz without a doubler, which eliminates the need for ½ harmonic filters. The VCO on this device covers an entire octave so the frequency coverage is complete down to 40MHz. The high performance PLL with a figure of merit of –236dBc/Hz and high phase detector frequency can attain very low in-band noise and integrated jitter.

The LMX2615-SP allows users to synchronize the output of multiple instances of the device. This means that deterministic phase can be obtained from a device in any use case including the one with fractional engine or output divider enabled. The device also adds support for either generating or repeating SYSREF (compliant to JESD204B standard), making the device designed low-noise clock source for high-speed data converters.
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技術文件

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重要文件 類型 標題 格式選項 下載最新的英文版本 日期
* 資料表 LMX2615-SP Space Grade 40MHz to 15GHz Wideband Synthesizer With Phase Synchronization and JESD204B Support datasheet (Rev. E) PDF | HTML 2025/12/11
* 輻射及可靠性報告 LMX2615-SP Enhanced Low Dose Rate Sensitivity (ELDRS) Characterization Radiation 2019/8/30
* 輻射及可靠性報告 Single Event Effect Report: LMX2615-SP 40MHz to 15 GHz Wideband Synthesizer 2019/8/30
* SMD LMX2615-SP SMD 5962-17236 2020/5/19
選擇指南 TI Space Products (Rev. L) 2026/3/27
Application brief Allan Deviation Measurement Data from LMX2615 2025/6/26
Application brief DLA Approved Optimizations for QML Products (Rev. C) PDF | HTML 2025/6/17
應用說明 Heavy Ion Orbital Environment Single-Event Effects Estimations (Rev. B) PDF | HTML 2025/6/10
應用說明 Practical Clocking Considerations That Give Your Next High-Speed Converter Design an Edge (Rev. A) PDF | HTML 2025/4/11
更多文件說明 TI Engineering Evaluation Units vs. MIL-PRF-38535 QML Class V Processing (Rev. B) 2025/2/20
Application brief Compilation of RF Synthesizer Resources PDF | HTML 2024/10/22
Circuit design MASH_SEED Optimization and Impact on Spurs (LMX2820) PDF | HTML 2024/8/8
證書 LMX2615EVM-CVAL EU Declaration of Conformity (DoC) PDF | HTML 2023/9/20
應用說明 Single-Event Effects Confidence Interval Calculations (Rev. A) PDF | HTML 2022/10/19
應用說明 Streamline RF Synthesizer VCO Calibration and Optimize PLL Lock Time (Rev. A) 2021/8/27
技術文章 Why component integration carries weight for space-based PLL synthesizers PDF | HTML 2020/2/10
電子書 Radiation Handbook for Electronics (Rev. A) 2019/5/21

設計與開發

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開發板

LMX2615EVM-CVAL — 航太級合成器評估模組

LMX2615EVM-CVAL 評估模組 (EVM) 專為評估 LMX2615-SP 產品而設計。它包括已組裝的 PCB，並使用 Reference Pro 對電路板進行編程，還提供了 100-MHz 輸入參考。此電路板裝配了 LMX2615W-MPR 工程樣品，可用於了解和測試航太級裝置 (5962R1723601VXC) 在室溫下的各種重要電氣規格和功能，因為這兩種裝置的針腳配置和軟體彼此相容。工程樣品尚未經歷或通過完整的航太級生產流程或測試。
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模擬型號

LMX2615 IBIS Model

SNAM229.ZIP (45 KB) - IBIS 模型
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設計工具

CLOCK-TREE-ARCHITECT — 時鐘樹架構程式設計軟體

時鐘樹架構是一款時鐘樹合成工具，可根據您的系統需求產生時鐘樹解決方案，進而簡化您的設計流程。此工具可從廣泛的計時產品資料庫中汲取資料，產生系統級多晶片計時解決方案。

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設計工具

PLLATINUMSIM-SW — PLL 迴路濾波器、相位雜訊、鎖定時間與雜散模擬工具

PLLATINUMSIM-SW 為一模擬工具，可讓使用者建立 PLLatinum™ 積體電路的詳細設計和模擬，包括 LMX 系列的相位鎖定迴路 (PLL) 及合成器。

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參考設計

TIDA-010191 — 航太級多通道 JESD204B 15-GHz 時脈參考設計

相位陣列天線和數位波束成形技術，是提高未來航太雷達成像和寬頻衛星通訊系統的性能的關鍵技術。數位波束成形與類比波束成形不同，通常每個天線元件需要一套資料轉換器。這些轉換器需要具有具體定義相位關係的時鐘。此參考設計展示如何透過已定義及可調整相位關係，產生低雜訊 MHz 至 GHz 時脈訊號。在發生單一事件後，甚至可能恢復時脈階段。透過操作兩個 ADC12DJ3200QML-SP 評估模組，及在 3.2 GHz 時其對應之 FPGA 架構擷取平台，以及 10-ps 板對板偏斜的情況，藉此來展示 JESD204B 支援。
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