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射頻 (RF) 與微波
RF PLL 與合成器

LMX2694-SEP

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耐輻射 15 GHz 寬頻 PLLatinum™ 射頻合成器

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產品規格表

LMX2694-SEP

現行
產品規格表 立即訂購

產品詳細資料

Frequency (max) (MHz) 15100 Frequency (min) (MHz) 39.3 Normalized PLL phase noise (dBc/Hz) -236 1/f noise (10-kHz offset at 1-GHz carrier) (dBc/Hz) -129 Features Enhanced Product, Integrated VCO, JESD204B SYSREF, Multi-device sync, Phase adjustment, Programmable output power, Wideband Current consumption (mA) 360 Integrated VCO Yes Operating temperature range (°C) -55 to 125 Rating Space Lock time (µs) (typ) (s) Loop BW dependent
Frequency (max) (MHz) 15100 Frequency (min) (MHz) 39.3 Normalized PLL phase noise (dBc/Hz) -236 1/f noise (10-kHz offset at 1-GHz carrier) (dBc/Hz) -129 Features Enhanced Product, Integrated VCO, JESD204B SYSREF, Multi-device sync, Phase adjustment, Programmable output power, Wideband Current consumption (mA) 360 Integrated VCO Yes Operating temperature range (°C) -55 to 125 Rating Space Lock time (µs) (typ) (s) Loop BW dependent
VQFNP (RTC) 48 49 mm² 7 x 7
  • VID V62/19616 -02XE
  • 39.3-MHz to 15.1-GHz output frequency
  • –110 dBc/Hz phase noise at 100-kHz offset with 15-GHz carrier
  • 54-fs RMS jitter at 8 GHz (100 Hz to 100 MHz)
  • Programmable output power
  • PLL key specifications
    • Figure of merit: –236 dBc/Hz
    • Normalized 1/f noise: –129 dBc/Hz
    • Up to 200-MHz phase detector frequency
  • Synchronization of output phase across multiple devices
  • Support for SYSREF with 9-ps resolution programmable delay
  • 3.3-V single power supply operation
  • Operating temperature range: –55°C to 125°C
  • Radiation specifications
    • Single event latch-up >43 MeV-cm2/mg
    • Total ionizing dose to 30 krad(Si)
  • VID V62/19616 -02XE
  • 39.3-MHz to 15.1-GHz output frequency
  • –110 dBc/Hz phase noise at 100-kHz offset with 15-GHz carrier
  • 54-fs RMS jitter at 8 GHz (100 Hz to 100 MHz)
  • Programmable output power
  • PLL key specifications
    • Figure of merit: –236 dBc/Hz
    • Normalized 1/f noise: –129 dBc/Hz
    • Up to 200-MHz phase detector frequency
  • Synchronization of output phase across multiple devices
  • Support for SYSREF with 9-ps resolution programmable delay
  • 3.3-V single power supply operation
  • Operating temperature range: –55°C to 125°C
  • Radiation specifications
    • Single event latch-up >43 MeV-cm2/mg
    • Total ionizing dose to 30 krad(Si)

The LMX2694-SEP device is a high-performance, wideband phase-locked loop (PLL) with an integrated voltage-controlled oscillator (VCO) and voltage regulators that can output any frequency between 39.3 MHz and 15.1 GHz without a doubler, eliminating the need for ½ harmonic filters. The VCO on this device covers an entire octave to complete the frequency coverage down to 39.3 MHz. The high-performance PLL, with a –236-dBc/Hz figure of merit and high-phase detector frequency, can achieve very low in-band noise and integrated jitter.

The LMX2694-SEP allows designers to synchronize the output of multiple instances of the device. This means that deterministic phase can be obtained from a device in any use case, including one with the fractional engine or output divider enabled. The device also allows designers to generate or repeat SYSREF (compliant to JESD204B standard) to use the device as a low-noise clock source for high-speed data converters.

The LMX2694-SEP device is a high-performance, wideband phase-locked loop (PLL) with an integrated voltage-controlled oscillator (VCO) and voltage regulators that can output any frequency between 39.3 MHz and 15.1 GHz without a doubler, eliminating the need for ½ harmonic filters. The VCO on this device covers an entire octave to complete the frequency coverage down to 39.3 MHz. The high-performance PLL, with a –236-dBc/Hz figure of merit and high-phase detector frequency, can achieve very low in-band noise and integrated jitter.

The LMX2694-SEP allows designers to synchronize the output of multiple instances of the device. This means that deterministic phase can be obtained from a device in any use case, including one with the fractional engine or output divider enabled. The device also allows designers to generate or repeat SYSREF (compliant to JESD204B standard) to use the device as a low-noise clock source for high-speed data converters.
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重要文件 類型 標題 格式選項 日期
* Data sheet LMX2694-SEP Radiation Hardened 15-GHz Wideband PLLatinum RF Synthesizer With Phase Synchronization datasheet (Rev. C) PDF | HTML 2022年 3月 1日
* Radiation & reliability report LMX2694-SEP Single Event Effects Test Report (Rev. A) 2022年 4月 1日
* Radiation & reliability report LMX2694-SEP Production Flow and Reliability Report (Rev. B) PDF | HTML 2022年 3月 11日
* VID LMX2694-SEP VID V6219616 2022年 1月 2日
Application note Practical Clocking Considerations That Give Your Next High-Speed Converter Design an Edge (Rev. A) PDF | HTML 2025年 4月 11日
Selection guide TI Space Products (Rev. K) 2025年 4月 4日
Application brief Compilation of RF Synthesizer Resources PDF | HTML 2024年 10月 22日
Technical article 航太級強化產品如何因應低地球軌道應用的挑戰 (Rev. A) PDF | HTML 2024年 1月 11日
Application note Reduce the Risk in Low-Earth Orbit Missions with Space Enhanced Plastic Products (Rev. A) PDF | HTML 2022年 9月 15日
E-book Radiation Handbook for Electronics (Rev. A) 2019年 5月 21日

設計與開發

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開發板

LMX2694EPEVM — 15-GHz 寬頻 RF 合成器評估模組

此評估模組適用於 LMX2694-EP，這是一款擴展溫度範圍的 15GHz 寬頻 RF 合成器。此合成器支援 JESD204B 相容 SYSREF 訊號緩衝及產生。LMX2694-EP 允許設計人員同步此裝置多重執行個體的輸出。
使用指南: PDF
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設計工具

PLLATINUMSIM-SW — PLL loop filter, phase noise, lock time, and spur simulation tool

PLLATINUMSIM-SW is a simulation tool that allows users to create detailed designs and simulations of our PLLatinum™ integrated circuits, which include the LMX series of phase-locked loops (PLLs) and synthesizers.

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參考設計

TIDA-010260 — 4T5R 航太級整合式收發器參考設計

4T5R 航太級整合式收發器參考設計整合了完整的 RF 取樣收發器，包括時脈解決方案和電源解決方案。此設計在 VITA-57 規格內整合了所有 -SEP 型 TI 裝置和符合航太標準的被動元件。
Design guide: PDF
參考設計

TIDA-010274 — 航太級離散式 RF 取樣收發器參考設計

此參考設計整合了一個 10 GSPS 雙數位轉類比轉換器和一個 5 GSPS 雙類比轉數位轉換器，RF 介面上有主動式平衡不平衡轉換器，支援 X 頻帶。此設計還整合了航太級時脈子卡和航太級電源解決方案子卡。
Design guide: PDF
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