產品詳細資料

Technology family LS Function Digital Multiplexer Configuration 8:1 Number of channels 1 Operating temperature range (°C) -55 to 125 Rating Military
Technology family LS Function Digital Multiplexer Configuration 8:1 Number of channels 1 Operating temperature range (°C) -55 to 125 Rating Military
CDIP (J) 16 135.3552 mm² 19.56 x 6.92 CFP (W) 16 69.319 mm² 10.3 x 6.73 LCCC (FK) 20 79.0321 mm² 8.89 x 8.89
  • Three-State Versions of '151, 'LS151, 'S151
  • Three State Outputs Interface Directly with System Bus
  • Perform Parallel-to-Serial Conversion
  • Permit Multiplexing from N-Lines to One Line
  • Complementary Outputs Provide True and Inverted Data
  • Fully Compatible with Most TTL Circuits

 

  • Three-State Versions of '151, 'LS151, 'S151
  • Three State Outputs Interface Directly with System Bus
  • Perform Parallel-to-Serial Conversion
  • Permit Multiplexing from N-Lines to One Line
  • Complementary Outputs Provide True and Inverted Data
  • Fully Compatible with Most TTL Circuits

 

These monolithic data selectors/multiplexers contain full on-chip binary decoding to select one-of-eight data sources and feature a strobe-controlled three-state output. The strobe must be at a low logic level to enable these devices. The three-state outputs permit a number of outputs to be connected to a common bus. When the strobe input is high, both outputs are in a high-impedance state in which both the upper and lower transistors of each totem-pole output are off, and the output neither drives nor loads the bus significantly. When the strobe is low, the outputs are activated and operate as standard TTL totem-pole outputs.

To minimize the possibility that two outputs will attempt to take a common bus to opposite logic levels, the output control circuitry is designed so that the average output disable time is shorter than the average output enable time. The SN54251 and SN74251 have output clamp diodes to attenuate reflections on the bus line.

 

These monolithic data selectors/multiplexers contain full on-chip binary decoding to select one-of-eight data sources and feature a strobe-controlled three-state output. The strobe must be at a low logic level to enable these devices. The three-state outputs permit a number of outputs to be connected to a common bus. When the strobe input is high, both outputs are in a high-impedance state in which both the upper and lower transistors of each totem-pole output are off, and the output neither drives nor loads the bus significantly. When the strobe is low, the outputs are activated and operate as standard TTL totem-pole outputs.

To minimize the possibility that two outputs will attempt to take a common bus to opposite logic levels, the output control circuitry is designed so that the average output disable time is shorter than the average output enable time. The SN54251 and SN74251 have output clamp diodes to attenuate reflections on the bus line.

 

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類型 標題 日期
* Data sheet Data Selectors/Multiplexers With 3-State Outputs datasheet 1988年 3月 1日
* SMD SN54LS251 SMD 7601601EA 2016年 6月 21日
Selection guide Logic Guide (Rev. AB) 2017年 6月 12日
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 2015年 12月 2日
User guide LOGIC Pocket Data Book (Rev. B) 2007年 1月 16日
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 2004年 7月 8日
Application note TI IBIS File Creation, Validation, and Distribution Processes 2002年 8月 29日
Application note Designing With Logic (Rev. C) 1997年 6月 1日
Application note Designing with the SN54/74LS123 (Rev. A) 1997年 3月 1日
Application note Input and Output Characteristics of Digital Integrated Circuits 1996年 10月 1日
Application note Live Insertion 1996年 10月 1日

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CDIP (J) 16 檢視選項
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LCCC (FK) 20 檢視選項

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