SN54SC8T573-SEP
- Vendor item drawing available, VID V62/25628-01XE
- Radiation - Total Ionizing Dose (TID):
- TID characterized up to 50krad(Si)
- TID performance assurance up to 30krad(Si)
- Radiation Lot Acceptance Testing (RLAT) for every wafer lot up to 30krad(Si)
- Radiation - Single-Event Effects (SEE):
- Single Event Latch-Up (SEL) immune up to 50MeV-cm2/mg at 125°C
- Single Event Transient (SET) characterized up to LET = 50MeV-cm2/mg
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Wide operating range of 1.2V to 5.5V
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Single-supply voltage translator:
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Up translation:
-
1.2V to 1.8V
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1.5V to 2.5V
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1.8V to 3.3V
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3.3V to 5.0V
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-
Down translation:
- 5.0V, 3.3V, 2.5V to 1.8V
- 5.0V, 3.3V to 2.5V
- 5.0V to 3.3V
-
- 5.5V tolerant input pins
- Supports standard pinouts
- Up to 150Mbps with 5V or 3.3V VCC
- Latch-up performance exceeds 250mA per JESD 17
- Space enhanced plastic:
- Supports defense and aerospace applications
- Controlled baseline
- Au bondwire and NiPdAu lead finish
- Meets NASA ASTM E595 outgassing specification
- One fabrication, assembly, and test site
- Extended product life cycle
- Product traceability
The SN54SC8T573-SEP devices are octal transparent D-type latches that feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.
While the latch-enable (LE) input is high, the Q outputs respond to the data (D) inputs. When LE is low, the outputs are latched to retain the data that was set up.
技術文件
| 類型 | 標題 | 日期 | ||
|---|---|---|---|---|
| * | Data sheet | SN54SC8T573-SEP Radiation Tolerant Octal Transparent D-Type Latches with 3-State Outputs datasheet | PDF | HTML | 2025年 1月 26日 |
| * | Radiation & reliability report | SN54SC8T573-SEP Production Flow and Reliability Report | PDF | HTML | 2025年 2月 21日 |
| * | Radiation & reliability report | SN54SC8T573-SEP Single-Event Effects (SEE) Radiation Report | PDF | HTML | 2025年 2月 20日 |
| * | Radiation & reliability report | SN54SC8T573-SEP Total Ionizing Dose (TID) Report | 2025年 2月 20日 |
設計與開發
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14-24-LOGIC-EVM — 適用於 14 針腳至 24 針腳 D、DB、DGV、DW、DYY、NS 和 PW 封裝的邏輯產品通用評估模組
14-24-LOGIC-EVM 評估模組 (EVM) 設計用於支援任何 14 針腳至 24 針腳 D、DW、DB、NS、PW、DYY 或 DGV 封裝的任何邏輯裝置。
14-24-NL-LOGIC-EVM — 適用於 14 針腳至 24 針腳無引線封裝的邏輯產品通用評估模組
14-24-NL-LOGIC-EVM 是一款靈活的評估模組 (EVM),設計用於支援任何具有 14 針腳至 24 針腳 BQA、BQB、RGY、RSV、RJW 或 RHL 封裝的邏輯或轉換裝置。
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| TSSOP (PW) | 20 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點