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SN74CB3Q3244

現行

具有 2 個控制輸入的 3.3-V、1:1 (SPST)、8 通道 FET 高頻寬匯流排開關

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產品規格表

SN74CB3Q3244

現行
產品規格表 立即訂購

產品詳細資料

Protocols Analog Configuration 1:1 SPST Number of channels 8 Bandwidth (MHz) 500 Supply voltage (max) (V) 3.6 Ron (typ) (mΩ) 4000 Input/output voltage (min) (V) 0 Input/output voltage (max) (V) 5.5 Supply current (typ) (µA) 1000 Operating temperature range (°C) -40 to 85 ESD CDM (kV) 1 Input/output continuous current (max) (mA) 64 COFF (typ) (pF) 3.5 CON (typ) (pF) 9 OFF-state leakage current (max) (µA) 1 Ron (max) (mΩ) 9000 VIH (min) (V) 1.7 VIL (max) (V) 0.8 Rating Catalog
Protocols Analog Configuration 1:1 SPST Number of channels 8 Bandwidth (MHz) 500 Supply voltage (max) (V) 3.6 Ron (typ) (mΩ) 4000 Input/output voltage (min) (V) 0 Input/output voltage (max) (V) 5.5 Supply current (typ) (µA) 1000 Operating temperature range (°C) -40 to 85 ESD CDM (kV) 1 Input/output continuous current (max) (mA) 64 COFF (typ) (pF) 3.5 CON (typ) (pF) 9 OFF-state leakage current (max) (µA) 1 Ron (max) (mΩ) 9000 VIH (min) (V) 1.7 VIL (max) (V) 0.8 Rating Catalog
SSOP (DBQ) 20 51.9 mm² 8.65 x 6 TSSOP (PW) 20 41.6 mm² 6.5 x 6.4 TVSOP (DGV) 20 32 mm² 5 x 6.4 VQFN (RGY) 20 15.75 mm² 4.5 x 3.5
  • High-Bandwidth Data Path (Up To 500 MHz)
  • 5-V-Tolerant I/Os with Device Powered-Up or Powered-Down
  • Low and Flat ON-State Resistance (ron) Characteristics Over Operating Range (ron = 4 Typical)
  • Rail-to-Rail Switching on Data I/O Ports
    • 0- to 5-V Switching With 3.3-V VCC
    • 0- to 3.3-V Switching With 2.5-V VCC
  • Bidirectional Data Flow, With Near-Zero Propagation Delay
  • Low Input/Output Capacitance Minimizes Loading and Signal Distortion (Cio(OFF) = 3.5 pF Typical)
  • Fast Switching Frequency (fOE = 20 MHz Max)
  • Data and Control Inputs Provide Undershoot Clamp Diodes
  • Low Power Consumption (ICC = 0.7 mA Typical)
  • VCC Operating Range From 2.3 V to 3.6 V
  • Data I/Os Support 0 to 5-V Signaling Levels (0.8-V, 1.2-V, 1.5-V, 1.8-V, 2.5-V, 3.3-V, 5-V)
  • Control Inputs Can Be Driven by TTL or 5-V/3.3-V CMOS Outputs
  • Ioff Supports Partial-Power-Down Mode Operation
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Performance Tested Per JESD 22
    • 2000-V Human-Body Model (A114-B, Class II)
    • 1000-V Charged-Device Model (C101)
  • Supports Both Digital and Analog Applications: Differential Signal Interface, Memory Interleaving, Bus Isolation, Low-Distortion Signal Gating

For additional information regarding the performance characteristics of the CB3Q family, refer to the TI application report, CBT-C, CB3T, and CB3Q Signal-Switch Families, literature number SCDA008.
  • High-Bandwidth Data Path (Up To 500 MHz)
  • 5-V-Tolerant I/Os with Device Powered-Up or Powered-Down
  • Low and Flat ON-State Resistance (ron) Characteristics Over Operating Range (ron = 4 Typical)
  • Rail-to-Rail Switching on Data I/O Ports
    • 0- to 5-V Switching With 3.3-V VCC
    • 0- to 3.3-V Switching With 2.5-V VCC
  • Bidirectional Data Flow, With Near-Zero Propagation Delay
  • Low Input/Output Capacitance Minimizes Loading and Signal Distortion (Cio(OFF) = 3.5 pF Typical)
  • Fast Switching Frequency (fOE = 20 MHz Max)
  • Data and Control Inputs Provide Undershoot Clamp Diodes
  • Low Power Consumption (ICC = 0.7 mA Typical)
  • VCC Operating Range From 2.3 V to 3.6 V
  • Data I/Os Support 0 to 5-V Signaling Levels (0.8-V, 1.2-V, 1.5-V, 1.8-V, 2.5-V, 3.3-V, 5-V)
  • Control Inputs Can Be Driven by TTL or 5-V/3.3-V CMOS Outputs
  • Ioff Supports Partial-Power-Down Mode Operation
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Performance Tested Per JESD 22
    • 2000-V Human-Body Model (A114-B, Class II)
    • 1000-V Charged-Device Model (C101)
  • Supports Both Digital and Analog Applications: Differential Signal Interface, Memory Interleaving, Bus Isolation, Low-Distortion Signal Gating

For additional information regarding the performance characteristics of the CB3Q family, refer to the TI application report, CBT-C, CB3T, and CB3Q Signal-Switch Families, literature number SCDA008.

The SN74CB3Q3244 is a high-bandwidth FET bus switch utilizing a charge pump to elevate the gate voltage of the pass transistor, providing a low and flat ON-state resistance (ron). The low and flat ON-state resistance allows for minimal propagation delay and supports rail-to-rail switching on the data input/output (I/O) ports. The device also features low data I/O capacitance to minimize capacitive loading and signal distortion on the data bus. Specifically designed to support high-bandwidth applications, the SN74CB3Q3244 provides an optimized interface solution ideally suited for broadband communications, networking, and data-intensive computing systems.

The SN74CB3Q3244 is organized as two 4-bit bus switches with separate output-enable (1OE\, 2OE\) inputs. It can be used as two 4-bit bus switches or as one 8-bit bus switch. When OE\ is low, the associated 4-bit bus switch is ON, and the A port is connected to the B port, allowing bidirectional data flow between ports. When OE\ is high, the associated 4-bit bus switch is OFF, and the high-impedance state exists between the A and B ports.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry prevents damaging current backflow through the device when it is powered down. The device has isolation during power off.

To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

The SN74CB3Q3244 is a high-bandwidth FET bus switch utilizing a charge pump to elevate the gate voltage of the pass transistor, providing a low and flat ON-state resistance (ron). The low and flat ON-state resistance allows for minimal propagation delay and supports rail-to-rail switching on the data input/output (I/O) ports. The device also features low data I/O capacitance to minimize capacitive loading and signal distortion on the data bus. Specifically designed to support high-bandwidth applications, the SN74CB3Q3244 provides an optimized interface solution ideally suited for broadband communications, networking, and data-intensive computing systems.

The SN74CB3Q3244 is organized as two 4-bit bus switches with separate output-enable (1OE\, 2OE\) inputs. It can be used as two 4-bit bus switches or as one 8-bit bus switch. When OE\ is low, the associated 4-bit bus switch is ON, and the A port is connected to the B port, allowing bidirectional data flow between ports. When OE\ is high, the associated 4-bit bus switch is OFF, and the high-impedance state exists between the A and B ports.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry prevents damaging current backflow through the device when it is powered down. The device has isolation during power off.

To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
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類型 標題 日期
* Data sheet SN74CB3Q3244 datasheet (Rev. B) 2004年 12月 2日
Application note Selecting the Correct Texas Instruments Signal Switch (Rev. E) PDF | HTML 2022年 6月 2日
Application note Multiplexers and Signal Switches Glossary (Rev. B) PDF | HTML 2021年 12月 1日
Application note CBT-C, CB3T, and CB3Q Signal-Switch Families (Rev. C) PDF | HTML 2021年 11月 19日
Application brief Eliminate Power Sequencing with Powered-off Protection Signal Switches (Rev. C) PDF | HTML 2021年 1月 6日
Selection guide Logic Guide (Rev. AB) 2017年 6月 12日
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 2015年 12月 2日
User guide LOGIC Pocket Data Book (Rev. B) 2007年 1月 16日
More literature Digital Bus Switch Selection Guide (Rev. A) 2004年 11月 10日
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 2004年 7月 8日
User guide Signal Switch Data Book (Rev. A) 2003年 11月 14日
Application note Bus FET Switch Solutions for Live Insertion Applications 2003年 2月 7日
Selection guide Logic Guide (Rev. AC) PDF | HTML 1994年 6月 1日

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使用指南: PDF
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SN74CB3Q3244 IBIS Model

SCDM066.ZIP (25 KB) - IBIS Model
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參考設計

PMP23630 — 適用於 HVDC 30kW PSU 的資料中心參考設計

此參考設計為一款具備高電壓 DC (HVDC) 輸出功能的兩級高效率 30kW 電源供應器。第一級為以三相輸入來源供電的三階飛馳電容器功率因數校正 (PFC) 轉換器。透過 TMS320F28P650DK 高性能微控制器執行 PFC 控制。由於電感器中的倍頻效應，選擇了飛馳電容器拓撲結構而非更傳統的拓撲結構（例如 Vienna 整流器）。這種倍增效應可使得電感器體積更小且效率更高。PFC 後接兩個 Δ-Δ 連接的三相電感器-電感器-電容器 (LLC) 轉換器。其中一個 LLC 用於 +400V，另一個 LLC 用於 -400V。LLC 轉換器可配置為獨立電源供應器，或作為單一 800V (...)
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SSOP (DBQ) 20 Ultra Librarian
TSSOP (PW) 20 Ultra Librarian
TVSOP (DGV) 20 Ultra Librarian
VQFN (RGY) 20 Ultra Librarian
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