TAS5504A
- Audio Input/Output
- Automatic Master Clock Rate and Data
Sample Rate Detection - Four Serial Audio Input Channels
- Four PWM Audio Output Channels
- Headphone PWM Output to Drive an External
Differential Amplifier Like the TPA112 - PWM Outputs Support Single-Ended and
Bridge-Tied Loads - 32-, 38-, 44.1-, 48-, 88.2-, 96-, 176.4-,
and 192-kHz Sampling Rates - Data Formats: 16-, 20-, or 24-Bit Left-Justified,
I2S, or Right-Justified Input Data - 64 × fS Bit-Clock Rate
- 128, 192, 256, 384, 512, and 768 × fS Master
Clock Rates (up to a Maximum of 50 MHz)
- Automatic Master Clock Rate and Data
- Audio Processing
- 48-Bit Processing Architecture With 76 Bits
of Precision for Most Audio-Processing Features - Volume Control Range: 36 dB to –109 dB
- Master Volume Control Range of 18 dB
to –100 dB - Four Individual Channel Volume Control
Ranges of 18-dB to –109-dB
- Master Volume Control Range of 18 dB
- Programmable Soft Volume and Mute Update Rates
- Two Bass and Treble Tone Controls With ±18-dB Range,
Selectable Corner Frequencies, and Second-Order Slopes- L, R, and C
- Sub
- Configurable Loudness Compensation
- Two Dynamic Range Compressors With Two Thresholds,
Two Offsets, and Three Slopes - Seven Biquads per Channel
- 8 × 4 Input Crossbar Mixer. Each Signal Processing
Channel Input Can Be Any Ratio of the Eight Input Channels - 4 × 2 Output Mixer – Channels 1 and 2. Each Output
Can Be Any Ratio of Any Two Signal-Processed Channels.
It Is Recommended to Use the Pass-Through Output Mixer
Configuration. - 4 × 3 Output Mixer – Channels 3 and 4. Each Output
Can Be Any Ratio of Any Three Signal-Processed Channels. It Is
Recommended to Use the Pass-Through Output Mixer Configuration. - Three Coefficient Sets Stored on the Device Can Be Selected
Manually or Automatically (Based on Specific Data Rates) - DC Blocking Filters
- Able to Support a Variety of Bass-Management Algorithms
- 48-Bit Processing Architecture With 76 Bits
- PWM Processing
- 32-Bit Processing PWM Architecture With
40 Bits of Precision - 8× Oversampling With 5th-Order Noise Shaping at
32 kHz–48 kHz, 4× Oversampling at 88.2 kHz and 96 kHz,
and 2× Oversampling at 176.4 kHz and 192 kHz - >102-dB Dynamic Range
- THD+N < 0.1%
- 20-Hz–20-kHz Flat Noise Floor for 44.1-, 48-,
88.2-, 96-, 176.4-, and 192-kHz Data Rates - Digital De-Emphasis for 32-, 44.1-, and
48-kHz Data Rates - Flexible Automute Logic With Programmable Threshold
and Duration for Noise-Free Operation - Intelligent AM Interference Avoidance
System Provides Clear AM Reception - Power-Supply Volume-Control (PSVC) Support for Enhanced
Dynamic Range in High-Performance Applications - Adjustable Modulation Limit
- 32-Bit Processing PWM Architecture With
- General Features
- Automated Operation With an Easy-to-Use
Control Interface - I2C Serial Control Slave Interface
- Integrated AM Interference Avoidance
- Single 3.3-V Power Supply
- 64-Pin TQFP Package
- 5-V Tolerant Inputs
- Automated Operation With an Easy-to-Use
The TAS5504A is a four-channel digital pulse-width modulator (PWM) that provides both advanced performance and a high level of system integration. The TAS5504A is designed to interface seamlessly with most audio digital signal processors. The TAS5504A automatically adjusts control configurations in response to clock and data-rate changes and idle conditions. This enables the TAS5504A to provide an easy-to-use control interface with relaxed timing requirements.
The TAS5504A can drive four channels of H-bridge power stages. Texas Instruments power stages are designed to work seamlessly with the TAS5504A. The TAS5504A supports either the single-ended or bridge-tied-load configuration. The TAS5504A also provides a high-performance differential output to drive an external differential-input analog headphone amplifier, such as the TPA112.
The TAS5504A uses AD modulation operating at a 384-kHz switching rate for 48-, 96-, and
192-kHz data. The 8× oversampling combined with the 5th-order noise shaper provides a broad, flat noise floor and excellent dynamic range from 20 Hz to 20 kHz.
The TAS5504A is a clocked, slave-only device. The TAS5504A receives MCLK, SCLK, and LRCLK from other system components. The TAS5504A accepts master clock rates of 128, 192, 256, 384, 512, and 768 fS. The TAS5504A accepts a 64-fS bit clock.
The TAS5504A allows for extending the dynamic range by providing a power-supply volume-control (PSVC) output signal.
技術文件
| 類型 | 標題 | 日期 | ||
|---|---|---|---|---|
| * | Data sheet | TAS5504A 4-Channel Digital Audio PWM Processor datasheet (Rev. B) | 2009年 7月 6日 | |
| * | Errata | TAS5504A Errata | 2006年 4月 7日 |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點